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zvecrzvecr
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Rework of 49 to latest requirements
1 parent 063b37e commit f5563d2

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2 files changed

+189
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‎mdloader_common.c

Lines changed: 123 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@ char verbose;
2929
char testmode;
3030
char first_device;
3131
int restart_after_program;
32+
int ignore_smarteeprom_config;
3233
int hex_cols;
3334
int hex_colw;
3435

@@ -382,6 +383,118 @@ int test_mcu(char silent)
382383
return 1;
383384
}
384385

386+
// SmartEEPROM NVMCTRL section
387+
uint8_t write_user_row(uint32_t* data)
388+
{
389+
//Read the current state of NVMCTRL.CTRLA
390+
NVMCTRL_CTRLA_Type ctrla;
391+
ctrla.reg = read_half_word(NVMCTRL_CTRLA);
392+
if (verbose) printf("NVMCTRL.CTRLA: 0x%04x\n\tAUTOWS: 0x%01x\n\tSUSPEN: 0x%01x\n\tWMODE: 0x%02x\n\tPRM: 0x%02x\n\tRWS: 0x%04x\n\tAHBNS0: 0x%01x\n\tAHBNS1: 0x%01x\n\tCACHEDIS0: 0x%01x\n\tCACHEDIS1: 0x%01x\n", ctrla.reg, ctrla.bit.AUTOWS, ctrla.bit.SUSPEN, ctrla.bit.WMODE, ctrla.bit.PRM, ctrla.bit.RWS, ctrla.bit.AHBNS0, ctrla.bit.AHBNS1, ctrla.bit.CACHEDIS0, ctrla.bit.CACHEDIS1);
393+
394+
printf("SmartEEPROM: Configuring... ");
395+
396+
//Set WMODE to Manual
397+
ctrla.bit.WMODE = NVMCTRL_CTRLA_WMODE_MAN;
398+
if (!write_half_word(NVMCTRL_CTRLA, ctrla.reg))
399+
{
400+
printf("Error: setting NVMCTRL.CTRLA.WMODE to Manual.\n");
401+
return 0;
402+
}
403+
slp(SLEEP_BETWEEN_WRITES);
404+
405+
// Set user row address
406+
if (!write_word(NVMCTRL_ADDR, NVMCTRL_USER))
407+
{
408+
printf("Error: setting NVMCTRL_ADDR to NVMCTRL_USER (1).\n");
409+
return 0;
410+
}
411+
412+
// Erase page
413+
NVMCTRL_CTRLB_Type ctrlb;
414+
ctrlb.reg = 0;
415+
ctrlb.bit.CMD = NVMCTRL_CTRLB_CMD_EP;
416+
ctrlb.bit.CMDEX = NVMCTRL_CTRLB_CMDEX_KEY;
417+
if (!write_half_word(NVMCTRL_CTRLB, ctrlb.reg))
418+
{
419+
printf("Error: setting NVMCTRL_CTRLB to 0x%04x (Erase page).\n", ctrlb.reg);
420+
return 0;
421+
}
422+
slp(SLEEP_BETWEEN_WRITES);
423+
424+
// Page buffer clear
425+
ctrlb.reg = 0;
426+
ctrlb.bit.CMD = NVMCTRL_CTRLB_CMD_PBC;
427+
ctrlb.bit.CMDEX = NVMCTRL_CTRLB_CMDEX_KEY;
428+
if (!write_half_word(NVMCTRL_CTRLB, ctrlb.reg))
429+
{
430+
printf("Error: setting NVMCTRL_CTRLB to 0x%04x (Page buffer clear).\n", ctrlb.reg);
431+
return 0;
432+
}
433+
slp(SLEEP_BETWEEN_WRITES);
434+
435+
// Write in the write buffer
436+
for (int i = 0; i < 4; i++)
437+
{
438+
if (!write_word(NVMCTRL_USER + i * 4, data[i]))
439+
{
440+
printf("Error: Unable to write NVMCTRL_USER page %i.\n", i);
441+
return 0;
442+
}
443+
slp(SLEEP_BETWEEN_WRITES);
444+
}
445+
446+
if (!write_word(NVMCTRL_ADDR, NVMCTRL_USER))
447+
{
448+
printf("Error: setting NVMCTRL_ADDR to NVMCTRL_USER (2).\n");
449+
return 0;
450+
}
451+
slp(SLEEP_BETWEEN_WRITES);
452+
453+
// Write quad word (128bits)
454+
ctrlb.reg = 0;
455+
ctrlb.bit.CMD = NVMCTRL_CTRLB_CMD_WQW;
456+
ctrlb.bit.CMDEX = NVMCTRL_CTRLB_CMDEX_KEY;
457+
if (!write_half_word(NVMCTRL_CTRLB, ctrlb.reg))
458+
{
459+
printf("Error: setting NVMCTRL_CTRLB to 0x%04x (Write Quad Word).\n", ctrlb.reg);
460+
return 0;
461+
}
462+
slp(SLEEP_BETWEEN_WRITES);
463+
464+
printf("Success!\n");
465+
return 1;
466+
}
467+
468+
uint8_t configure_smarteeprom(void)
469+
{
470+
uint32_t user_row[4];
471+
for (int i = 0; i < 4; i++)
472+
{
473+
user_row[i] = read_word(NVMCTRL_USER + i * 4);
474+
}
475+
476+
NVMCTRL_USER_ROW_MAPPING1_Type* puser_row1 = (NVMCTRL_USER_ROW_MAPPING1_Type*)(&user_row[1]);
477+
478+
if (verbose) printf("SmartEEPROM: config - SBLK: 0x%04x - PSZ: 0x%03x.\n", puser_row1->bit.SBLK, puser_row1->bit.PSZ);
479+
480+
if(puser_row1->bit.SBLK == SMARTEEPROM_TARGET_SBLK && puser_row1->bit.PSZ == SMARTEEPROM_TARGET_PSZ)
481+
{
482+
if (verbose) printf("SmartEEPROM: Configured!\n");
483+
return 1;
484+
}
485+
486+
if(ignore_smarteeprom_config)
487+
{
488+
printf("SmartEEPROM: Your settings do not match the recommended values. Skipped!");
489+
return 1;
490+
}
491+
492+
// Set SmartEEPROM Virtual Size.
493+
puser_row1->bit.SBLK = SMARTEEPROM_TARGET_SBLK;
494+
puser_row1->bit.PSZ = SMARTEEPROM_TARGET_PSZ;
495+
return write_user_row(user_row);
496+
}
497+
385498
//Upper case any lower case characters in a string
386499
void strlower(char *str)
387500
{
@@ -495,6 +608,7 @@ void display_help(void)
495608
printf(" -s --size size Read firmware size of <size>\n");
496609
printf(" -D --download file Write firmware from <file> into device\n");
497610
printf(" -t --test Test mode (download/upload writes disabled, upload outputs data to stdout, restart disabled)\n");
611+
printf(" --ignore-eep Ignore differences in SmartEEPROM configuration\n");
498612
printf(" --cols count Hex listing column count <count> [%i]\n", COLS);
499613
printf(" --colw width Hex listing column width <width> [%i]\n", COLW);
500614
printf(" --restart Restart device after successful programming\n");
@@ -507,7 +621,8 @@ void display_help(void)
507621
//Program command line options
508622
struct option long_options[] = {
509623
//Flags
510-
{ "restart", no_argument, &restart_after_program, 1 },
624+
{ "restart", no_argument, &restart_after_program, 1 },
625+
{ "ignore-eep", no_argument, &ignore_smarteeprom_config, 1 },
511626
//Other
512627
{ "verbose", no_argument, 0, 'v' },
513628
{ "help", no_argument, 0, 'h' },
@@ -531,6 +646,7 @@ int main(int argc, char *argv[])
531646
testmode = 0;
532647
first_device = 0;
533648
restart_after_program = 0;
649+
ignore_smarteeprom_config = 0;
534650
hex_cols = COLS;
535651
hex_colw = COLW;
536652

@@ -756,7 +872,13 @@ int main(int argc, char *argv[])
756872
print_bootloader_version();
757873
if (verbose) printf("Device ID: %08X\n", mcu->cidr);
758874

875+
if (!configure_smarteeprom())
876+
{
877+
printf("Error: Config feature failed!\n");
878+
goto closePort;
879+
}
759880

881+
//Load applet
760882
memcpy(&appinfo, applet_data + applet_size - sizeof(appinfo_t), sizeof(appinfo_t));
761883
if (appinfo.magic != 0x4142444D)
762884
{

‎mdloader_common.h

Lines changed: 66 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@
4646
#include <string.h>
4747
#include <stdint.h>
4848
#include <getopt.h>
49+
#include <ctype.h>
4950

5051
//Atmel files
5152
#include "./atmel/applet.h"
@@ -163,6 +164,7 @@ int read_byte(int addr);
163164
int read_half_word(int addr);
164165
int read_word(int addr);
165166
int set_terminal_mode(void);
167+
uint8_t configure_smarteeprom(void);
166168

167169
//OS specific commands
168170
void print_com_example(void);
@@ -181,8 +183,72 @@ int filesize(char *fname);
181183
int read_data(int addr, int readsize);
182184
int write_data(int addr, int writesize, int data);
183185
void list_devices(char *first);
186+
187+
// helpers
184188
void strupper(char *str);
185189
void strlower(char *str);
186190

191+
// Smart EEPROM specific
192+
#define NVMCTRL 0x41004000
193+
#define NVMCTRL_CTRLA (NVMCTRL)
194+
#define NVMCTRL_CTRLB (NVMCTRL + 4)
195+
#define NVMCTRL_ADDR (NVMCTRL + 0x14)
196+
197+
#define NVMCTRL_CTRLA_WMODE_MAN 0x0
198+
#define NVMCTRL_CTRLB_CMDEX_KEY 0xA5
199+
#define NVMCTRL_CTRLB_CMD_WQW 0x4
200+
#define NVMCTRL_CTRLB_CMD_PBC 0x15
201+
#define NVMCTRL_CTRLB_CMD_EP 0x0
202+
203+
#define NVMCTRL_USER 0x00804000
204+
205+
#define SLEEP_BETWEEN_WRITES 200
206+
207+
// Configured for 2048 bytes - DS60001507E-page 653
208+
#define SMARTEEPROM_TARGET_SBLK 1 // 1 block
209+
#define SMARTEEPROM_TARGET_PSZ 2 // 16 bytes
210+
211+
typedef union {
212+
struct {
213+
uint32_t SBLK : 4; /* bit: 35:32 - Number of NVM Blocks composing a SmartEEPROM sector */
214+
uint32_t PSZ : 3; /* bit: 38:36 - SmartEEPROM Page Size */
215+
uint32_t RAM_ECCDIS : 1; /* bit: 39 - RAM ECC Disable */
216+
uint32_t : 8; /* bit: 47:40 - Factory settings - do not change */
217+
uint32_t WDT_ENABLE : 1; /* bit: 48 - WDT Enable at power-on */
218+
uint32_t WDT_ALWAYS_ON : 1; /* bit: 49 - WDT Always-On at power-on */
219+
uint32_t WDT_PERIOD : 4; /* bit: 53:50 - WDT Period at power-on */
220+
uint32_t WDT_WINDOW : 4; /* bit: 57:54 - WDT Window mode time-out at power - on */
221+
uint32_t WDT_EWOFFSET : 4; /* bit: 61:58 - WDT Early Warning Interrupt Time Offset at power - on */
222+
uint32_t WDT_WEN : 1; /* bit: 62 - WDT Window Mode Enable at power - on */
223+
uint32_t : 1; /* bit: 63 - Factory settings - do not change */
224+
} bit;
225+
uint32_t reg;
226+
} NVMCTRL_USER_ROW_MAPPING1_Type;
227+
228+
typedef union {
229+
struct {
230+
uint16_t : 2; /* bit: 1:0 Reserved */
231+
uint16_t AUTOWS : 1; /* bit: 2 Auto Wait State Enable */
232+
uint16_t SUSPEN : 1; /* bit: 3 Suspend Enable */
233+
uint16_t WMODE : 2; /* bit: 5:4 Write Mode */
234+
uint16_t PRM : 2; /* bit: 7:6 Power Reduction Mode during Sleep */
235+
uint16_t RWS : 4; /* bit: 11:8 NVM Read Wait States */
236+
uint16_t AHBNS0 : 1; /* bit: 12 Force AHB0 access to NONSEQ, burst transfers are continuously rearbitrated */
237+
uint16_t AHBNS1 : 1; /* bit: 13 Force AHB1 access to NONSEQ, burst transfers are continuously rearbitrated */
238+
uint16_t CACHEDIS0 : 1; /* bit: 14 AHB0 Cache Disable */
239+
uint16_t CACHEDIS1 : 1; /* bit: 15 AHB1 Cache Disable */
240+
} bit;
241+
uint16_t reg;
242+
} NVMCTRL_CTRLA_Type;
243+
244+
typedef union {
245+
struct {
246+
uint16_t CMD : 7; /* bit: 6:0 Command */
247+
uint16_t : 1; /* bit: 7 Reserved */
248+
uint16_t CMDEX : 8; /* bit: 15:8 Command Execution */
249+
} bit;
250+
uint16_t reg;
251+
} NVMCTRL_CTRLB_Type;
252+
187253
#endif //_MDLOADER_COMMON_H
188254

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