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TheZocTheZoc
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Added SmartEEPROM Support
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2 files changed

+196
-2
lines changed

2 files changed

+196
-2
lines changed

‎mdloader_common.c

Lines changed: 122 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -377,6 +377,110 @@ int test_mcu(char silent)
377377
return 1;
378378
}
379379

380+
// SmartEEPROM NVMCTRL section
381+
int write_user_row(uint32_t* data)
382+
{
383+
//Set WMODE to Manual
384+
NVMCTRL_CTRLA_Type ctrla;
385+
ctrla.reg = read_half_word(NVMCTRL_CTRLA);
386+
printf("NVMCTRL.CTRLA: 0x%04x\n\tAUTOWS: 0x%01x\n\tSUSPEN: 0x%01x\n\tWMODE: 0x%02x\n\tPRM: 0x%02x\n\tRWS: 0x%04x\n\tAHBNS0: 0x%01x\n\tAHBNS1: 0x%01x\n\tCACHEDIS0: 0x%01x\n\tCACHEDIS1: 0x%01x\n", ctrla.reg, ctrla.bit.AUTOWS, ctrla.bit.SUSPEN, ctrla.bit.WMODE, ctrla.bit.PRM, ctrla.bit.RWS, ctrla.bit.AHBNS0, ctrla.bit.AHBNS1, ctrla.bit.CACHEDIS0, ctrla.bit.CACHEDIS1);
387+
ctrla.bit.WMODE = NVMCTRL_CTRLA_WMODE_MAN;
388+
389+
printf("Configuring SmartEEPROM... ");
390+
391+
if (!write_half_word(NVMCTRL_CTRLA, ctrla.reg))
392+
{
393+
printf("Error setting NVMCTRL.CTRLA.WMODE to Manual\n");
394+
return 0;
395+
}
396+
slp(100);
397+
398+
// Set user row address
399+
if (!write_word(NVMCTRL_ADDR, NVMCTRL_USER))
400+
{
401+
printf("Error setting NVMCTRL_ADDR to NVMCTRL_USER (1)\n");
402+
return 0;
403+
}
404+
405+
// Erase page
406+
NVMCTRL_CTRLB_Type ctrlb;
407+
ctrlb.reg = 0;
408+
ctrlb.bit.CMD = NVMCTRL_CTRLB_CMD_EP;
409+
ctrlb.bit.CMDEX = NVMCTRL_CTRLB_CMDEX_KEY;
410+
if (!write_half_word(NVMCTRL_CTRLB, ctrlb.reg))
411+
{
412+
printf("Error setting NVMCTRL_CTRLB to 0x%04x (Erase page)\n", ctrlb.reg);
413+
return 0;
414+
}
415+
slp(100);
416+
417+
// Page buffer clear
418+
ctrlb.reg = 0;
419+
ctrlb.bit.CMD = NVMCTRL_CTRLB_CMD_PBC;
420+
ctrlb.bit.CMDEX = NVMCTRL_CTRLB_CMDEX_KEY;
421+
if (!write_half_word(NVMCTRL_CTRLB, ctrlb.reg))
422+
{
423+
printf("Error setting NVMCTRL_CTRLB to 0x%04x (Page buffer clear)\n", ctrlb.reg);
424+
return 0;
425+
}
426+
slp(100);
427+
428+
// Write in the write buffer
429+
for (int i = 0; i < 4; i++)
430+
{
431+
if (!write_word(NVMCTRL_USER + i * 4, data[i]))
432+
{
433+
printf("Warning: Unable to write NVMCTRL_USER page %i\n", i);
434+
}
435+
slp(100);
436+
}
437+
438+
if (!write_word(NVMCTRL_ADDR, NVMCTRL_USER))
439+
{
440+
printf("Error setting NVMCTRL_ADDR to NVMCTRL_USER (2)\n");
441+
return 0;
442+
}
443+
slp(100);
444+
445+
// Write quad word (128bits)
446+
ctrlb.reg = 0;
447+
ctrlb.bit.CMD = NVMCTRL_CTRLB_CMD_WQW;
448+
ctrlb.bit.CMDEX = NVMCTRL_CTRLB_CMDEX_KEY;
449+
if (!write_half_word(NVMCTRL_CTRLB, ctrlb.reg))
450+
{
451+
printf("Error setting NVMCTRL_CTRLB to 0x%04x (Write Quad Word)\n", ctrlb.reg);
452+
return 0;
453+
}
454+
455+
printf("Success!\n");
456+
return 1;
457+
}
458+
459+
void read_user_row(void)
460+
{
461+
uint32_t user_row[4];
462+
printf("user row: ");
463+
for (int i = 0; i < 4; i++)
464+
{
465+
user_row[i] = read_word(NVMCTRL_USER + i * 4);
466+
printf("0x%08x ", user_row[i]);
467+
}
468+
printf("\n");
469+
470+
NVMCTRL_USER_ROW_MAPPING1_Type* puser_row1 = (NVMCTRL_USER_ROW_MAPPING1_Type*)(&user_row[1]);
471+
if (puser_row1->bit.SBLK == 0 && puser_row1->bit.PSZ == 0)
472+
{
473+
printf("SmartEEPROM not configured, proceed\n");
474+
puser_row1->bit.SBLK = 0x2; // 2 blocks
475+
puser_row1->bit.PSZ = 0x1; // 8 bytes
476+
write_user_row(user_row);
477+
}
478+
else
479+
{
480+
printf("SmartEEPROM already configured - SBLK: 0x%04x - PSZ: 0x%03x\n", puser_row1->bit.SBLK, puser_row1->bit.PSZ);
481+
}
482+
}
483+
380484
//Upper case any lower case characters in a string
381485
void strlower(char *str)
382486
{
@@ -490,6 +594,7 @@ void display_help(void)
490594
printf(" -s --size size Read firmware size of <size>\n");
491595
printf(" -D --download file Write firmware from <file> into device\n");
492596
printf(" -t --test Test mode (download/upload writes disabled, upload outputs data to stdout, restart disabled)\n");
597+
printf(" --smarteep Enable Smart EEPROM MCU feature\n");
493598
printf(" --cols count Hex listing column count <count> [%i]\n", COLS);
494599
printf(" --colw width Hex listing column width <width> [%i]\n", COLW);
495600
printf(" --restart Restart device after successful programming\n");
@@ -498,6 +603,7 @@ void display_help(void)
498603

499604
#define SW_COLS 1000
500605
#define SW_COLW 1001
606+
#define SW_SMARTEEP 1002
501607

502608
//Program command line options
503609
struct option long_options[] = {
@@ -515,6 +621,7 @@ struct option long_options[] = {
515621
{ "addr", required_argument, 0, 'a' },
516622
{ "size", required_argument, 0, 's' },
517623
{ "test", no_argument, 0, 't' },
624+
{ "smarteep", no_argument, 0, SW_SMARTEEP },
518625
{ "cols", required_argument, 0, SW_COLS },
519626
{ "colw", required_argument, 0, SW_COLW },
520627
{ 0, 0, 0, 0 }
@@ -628,6 +735,10 @@ int main(int argc, char *argv[])
628735
testmode = 1;
629736
break;
630737

738+
case SW_SMARTEEP:
739+
command = CMD_READ_USER_ROW;
740+
break;
741+
631742
case SW_COLS:
632743
hex_cols = atoi(optarg);
633744
if (hex_cols < 1)
@@ -751,14 +862,24 @@ int main(int argc, char *argv[])
751862
print_bootloader_version();
752863
if (verbose) printf("Device ID: %08X\n", mcu->cidr);
753864

865+
if (command == CMD_READ_USER_ROW)
866+
{
867+
read_user_row();
868+
869+
if (restart_after_program)
870+
jump_application();
871+
872+
goto exitProgram;
873+
}
874+
754875
//Load applet
755876
FILE *fIn;
756877
char appletfname[128] = "";
757878
strlower(mcu->name);
758879

759880
//sprintf(appletfname, "applet-flash-%s.bin", mcu->name);
760881
sprintf(appletfname, "applet-mdflash.bin"); //make filename non-dependent upon mcu->name
761-
882+
762883
printf("Applet file: %s\n", appletfname);
763884

764885
fIn = fopen(appletfname, "rb");

‎mdloader_common.h

Lines changed: 74 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -144,7 +144,8 @@ enum command {
144144
CMD_DOWNLOAD,
145145
CMD_UPLOAD,
146146
CMD_TEST,
147-
CMD_ABORT
147+
CMD_ABORT,
148+
CMD_READ_USER_ROW
148149
};
149150

150151
extern struct option long_options[];
@@ -183,6 +184,78 @@ int write_data(int addr, int writesize, int data);
183184
void list_devices(char *first);
184185
void strupper(char *str);
185186
void strlower(char *str);
187+
void read_user_row(void);
188+
189+
// Smart EEPROM specific
190+
#define NVMCTRL 0x41004000
191+
#define NVMCTRL_CTRLA (NVMCTRL)
192+
#define NVMCTRL_CTRLB (NVMCTRL + 4)
193+
#define NVMCTRL_ADDR (NVMCTRL + 0x14)
194+
195+
#define NVMCTRL_CTRLA_WMODE_MAN 0x0
196+
#define NVMCTRL_CTRLB_CMDEX_KEY 0xA5
197+
#define NVMCTRL_CTRLB_CMD_WQW 0x4
198+
#define NVMCTRL_CTRLB_CMD_PBC 0x15
199+
#define NVMCTRL_CTRLB_CMD_EP 0x0
200+
201+
#define NVMCTRL_USER 0x00804000
202+
203+
204+
205+
typedef union {
206+
struct {
207+
uint32_t SBLK : 4; /* bit: 35:32 - Number of NVM Blocks composing a SmartEEPROM sector */
208+
uint32_t PSZ : 3; /* bit: 38:36 - SmartEEPROM Page Size */
209+
uint32_t RAM_ECCDIS : 1; /* bit: 39 - RAM ECC Disable */
210+
uint32_t : 8; /* bit: 47:40 - Factory settings - do not change */
211+
uint32_t WDT_ENABLE : 1; /* bit: 48 - WDT Enable at power-on */
212+
uint32_t WDT_ALWAYS_ON : 1; /* bit: 49 - WDT Always-On at power-on */
213+
uint32_t WDT_PERIOD : 4; /* bit: 53:50 - WDT Period at power-on */
214+
uint32_t WDT_WINDOW : 4; /* bit: 57:54 - WDT Window mode time-out at power - on */
215+
uint32_t WDT_EWOFFSET : 4; /* bit: 61:58 - WDT Early Warning Interrupt Time Offset at power - on */
216+
uint32_t WDT_WEN : 1; /* bit: 62 - WDT Window Mode Enable at power - on */
217+
uint32_t : 1; /* bit: 63 - Factory settings - do not change */
218+
} bit;
219+
uint32_t reg;
220+
} NVMCTRL_USER_ROW_MAPPING1_Type;
221+
222+
typedef union {
223+
struct {
224+
uint16_t : 2; /* bit: 1:0 Reserved */
225+
uint16_t AUTOWS : 1; /* bit: 2 Auto Wait State Enable */
226+
uint16_t SUSPEN : 1; /* bit: 3 Suspend Enable */
227+
uint16_t WMODE : 2; /* bit: 5:4 Write Mode */
228+
uint16_t PRM : 2; /* bit: 7:6 Power Reduction Mode during Sleep */
229+
uint16_t RWS : 4; /* bit: 11:8 NVM Read Wait States */
230+
uint16_t AHBNS0 : 1; /* bit: 12 Force AHB0 access to NONSEQ, burst transfers are continuously rearbitrated */
231+
uint16_t AHBNS1 : 1; /* bit: 13 Force AHB1 access to NONSEQ, burst transfers are continuously rearbitrated */
232+
uint16_t CACHEDIS0 : 1; /* bit: 14 AHB0 Cache Disable */
233+
uint16_t CACHEDIS1 : 1; /* bit: 15 AHB1 Cache Disable */
234+
} bit;
235+
uint16_t reg;
236+
} NVMCTRL_CTRLA_Type;
237+
238+
typedef union {
239+
struct {
240+
uint16_t CMD : 7; /* bit: 6:0 Command */
241+
uint16_t : 1; /* bit: 7 Reserved */
242+
uint16_t CMDEX : 8; /* bit: 15:8 Command Execution */
243+
} bit;
244+
uint16_t reg;
245+
} NVMCTRL_CTRLB_Type;
246+
247+
typedef union {
248+
struct {
249+
uint16_t PROT : 1; /* bit: 0 Protected */
250+
uint16_t DBGPRES : 1; /* bit: 1 Debugger */
251+
uint16_t DCCD0 : 1; /* bit: 2 Debug Communication Channel x Dirty */
252+
uint16_t DCCD1 : 1; /* bit: 3 Debug Communication Channel x Dirty */
253+
uint16_t HPE : 1; /* bit: 4 Hot-Plugging Enable */
254+
uint16_t CELCK : 1; /* bit: 5 Chip Erase Locked */
255+
uint16_t : 2; /* bit: 7:6 Reserved */
256+
} bit;
257+
uint16_t reg;
258+
} DSU_STATUSB_Type;
186259

187260
#endif //_MDLOADER_COMMON_H
188261

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