seven_seg.luc

module seven_seg (
    input char[4],
    output segs[7]
  ) {

  always {
    case (char) {
      0: segs = 7b0111111;
      1: segs = 7b0000110;
      2: segs = 7b1011011;
      3: segs = 7b1001111;
      4: segs = 7b1100110;
      5: segs = 7b1101101;
      6: segs = 7b1111101;
      7: segs = 7b0000111;
      8: segs = 7b1111111;
      9: segs = 7b1100111;
      default: segs = 7b0000000;
    }
  }
}