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| 1 | +; RUN: llvm-as %s -o %t.bc |
| 2 | +; RUN: not llvm-spirv %t.bc -o %t.spv 2>&1 | FileCheck %s --check-prefix=CHECK-WO-EXT |
| 3 | + |
| 4 | +; RUN: llvm-spirv -spirv-text %t.bc -o %t.spt --spirv-ext=+SPV_EXT_relaxed_printf_string_address_space,+SPV_INTEL_non_constant_addrspace_printf |
| 5 | +; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV |
| 6 | + |
| 7 | +; RUN: llvm-spirv -to-binary %t.spt -o %t.spv |
| 8 | +; RUN: llvm-spirv -r -emit-opaque-pointers %t.spv -o %t.rev.bc |
| 9 | +; RUN: llvm-dis %t.rev.bc -o %t.rev.ll |
| 10 | +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM |
| 11 | + |
| 12 | +; CHECK-WO-EXT: RequiresExtension: Feature requires the following SPIR-V extension: |
| 13 | +; CHECK-WO-EXT: Either SPV_EXT_relaxed_printf_string_address_space or SPV_INTEL_non_constant_addrspace_printf extension should be allowed to translate this module, because this LLVM module contains the printf function with format string, whose address space is not equal to 2 (constant). |
| 14 | + |
| 15 | +; CHECK-SPIRV-NOT: Capability NonConstantAddrspacePrintfINTEL |
| 16 | +; CHECK-SPIRV-NOT: Extension "SPV_INTEL_non_constant_addrspace_printf" |
| 17 | +; CHECK-SPIRV: Extension "SPV_EXT_relaxed_printf_string_address_space" |
| 18 | +; CHECK-SPIRV: ExtInstImport [[#ExtInstSetId:]] "OpenCL.std" |
| 19 | +; CHECK-SPIRV: TypeInt [[#TypeInt8Id:]] 8 0 |
| 20 | +; CHECK-SPIRV: TypeInt [[#TypeInt32Id:]] 32 0 |
| 21 | +; CHECK-SPIRV: TypePointer [[#FunctionStorClassPtrTy:]] 7 [[#TypeInt8Id]] |
| 22 | +; CHECK-SPIRV: TypePointer [[#WGStorClassPtrTy:]] 5 [[#TypeInt8Id]] |
| 23 | +; CHECK-SPIRV: TypePointer [[#CrossWFStorClassPtrTy:]] 4 [[#TypeInt8Id]] |
| 24 | +; CHECK-SPIRV: TypePointer [[#GenericStorCalssPtrTy:]] 8 [[#TypeInt8Id]] |
| 25 | +; CHECK-SPIRV: InBoundsPtrAccessChain [[#FunctionStorClassPtrTy]] [[#GEP1:]] |
| 26 | +; CHECK-SPIRV: ExtInst [[#TypeInt32Id]] [[#]] [[#ExtInstSetId:]] printf [[#GEP1]] |
| 27 | +; CHECK-SPIRV: InBoundsPtrAccessChain [[#WGStorClassPtrTy]] [[#GEP2:]] |
| 28 | +; CHECK-SPIRV: ExtInst [[#TypeInt32Id]] [[#]] [[#ExtInstSetId:]] printf [[#GEP2]] |
| 29 | +; CHECK-SPIRV: InBoundsPtrAccessChain [[#CrossWFStorClassPtrTy:]] [[#GEP3:]] |
| 30 | +; CHECK-SPIRV: ExtInst [[#TypeInt32Id]] [[#]] [[#ExtInstSetId:]] printf [[#GEP3]] |
| 31 | +; CHECK-SPIRV: InBoundsPtrAccessChain [[#GenericStorCalssPtrTy:]] [[#GEP4:]] |
| 32 | +; CHECK-SPIRV: ExtInst [[#TypeInt32Id]] [[#]] [[#ExtInstSetId:]] printf [[#GEP4]] |
| 33 | + |
| 34 | +; CHECK-LLVM: call spir_func i32 @_Z18__spirv_ocl_printfPc(ptr {{.*}} |
| 35 | +; CHECK-LLVM: call spir_func i32 @_Z18__spirv_ocl_printfPU3AS1c(ptr addrspace(1) {{.*}} |
| 36 | +; CHECK-LLVM: call spir_func i32 @_Z18__spirv_ocl_printfPU3AS3c(ptr addrspace(3) {{.*}} |
| 37 | +; CHECK-LLVM: call spir_func i32 @_Z18__spirv_ocl_printfPU3AS4c(ptr addrspace(4) {{.*}} |
| 38 | + |
| 39 | +; ModuleID = 'non-constant-printf' |
| 40 | +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024" |
| 41 | +target triple = "spir-unknown-unknown" |
| 42 | + |
| 43 | +@0 = internal unnamed_addr addrspace(0) constant [6 x i8] c"Test\0A\00", align 1 |
| 44 | +@1 = internal unnamed_addr addrspace(1) constant [6 x i8] c"Test\0A\00", align 1 |
| 45 | +@2 = internal unnamed_addr addrspace(3) constant [6 x i8] c"Test\0A\00", align 1 |
| 46 | +@3 = internal unnamed_addr addrspace(4) constant [6 x i8] c"Test\0A\00", align 1 |
| 47 | + |
| 48 | +; Function Attrs: nounwind |
| 49 | +define spir_kernel void @test() #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !3 !kernel_arg_type !3 !kernel_arg_type_qual !3 !kernel_arg_base_type !3 { |
| 50 | + %1 = getelementptr inbounds [6 x i8], [6 x i8]* @0, i32 0, i32 0 |
| 51 | + %2 = call spir_func i32 @_Z18__spirv_ocl_printfPc(i8* %1) #0 |
| 52 | + %3 = getelementptr inbounds [6 x i8], [6 x i8] addrspace(1)* @1, i32 0, i32 0 |
| 53 | + %4 = call spir_func i32 @_Z18__spirv_ocl_printfPU3AS1c(i8 addrspace(1)* %3) #0 |
| 54 | + %5 = getelementptr inbounds [6 x i8], [6 x i8] addrspace(3)* @2, i32 0, i32 0 |
| 55 | + %6 = call spir_func i32 @_Z18__spirv_ocl_printfPU3AS3c(i8 addrspace(3)* %5) #0 |
| 56 | + %7 = getelementptr inbounds [6 x i8], [6 x i8] addrspace(4)* @3, i32 0, i32 0 |
| 57 | + %8 = call spir_func i32 @_Z18__spirv_ocl_printfPU3AS4c(i8 addrspace(4)* %7) #0 |
| 58 | + ret void |
| 59 | +} |
| 60 | + |
| 61 | +; Function Attrs: nounwind |
| 62 | +declare spir_func i32 @_Z18__spirv_ocl_printfPc(i8*) #0 |
| 63 | + |
| 64 | +; Function Attrs: nounwind |
| 65 | +declare spir_func i32 @_Z18__spirv_ocl_printfPU3AS1c(i8 addrspace(1)*) #0 |
| 66 | + |
| 67 | +; Function Attrs: nounwind |
| 68 | +declare spir_func i32 @_Z18__spirv_ocl_printfPU3AS3c(i8 addrspace(3)*) #0 |
| 69 | + |
| 70 | +; Function Attrs: nounwind |
| 71 | +declare spir_func i32 @_Z18__spirv_ocl_printfPU3AS4c(i8 addrspace(4)*) #0 |
| 72 | + |
| 73 | +attributes #0 = { nounwind } |
| 74 | + |
| 75 | +!spirv.MemoryModel = !{!0} |
| 76 | +!opencl.enable.FP_CONTRACT = !{} |
| 77 | +!spirv.Source = !{!1} |
| 78 | +!opencl.spir.version = !{!2} |
| 79 | +!opencl.ocl.version = !{!2} |
| 80 | +!opencl.used.extensions = !{!3} |
| 81 | +!opencl.used.optional.core.features = !{!3} |
| 82 | +!spirv.Generator = !{!4} |
| 83 | + |
| 84 | +!0 = !{i32 1, i32 2} |
| 85 | +!1 = !{i32 3, i32 200000} |
| 86 | +!2 = !{i32 2, i32 0} |
| 87 | +!3 = !{} |
| 88 | +!4 = !{i16 7, i16 0} |
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