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1 parent d914fab commit 88c3addCopy full SHA for 88c3add
llvm/test/CodeGen/Hexagon/isel/pfalse-v4i1.ll
@@ -1,4 +1,5 @@
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; RUN: llc -march=hexagon -debug-only=isel 2>&1 < %s - | FileCheck %s
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+; REQUIRES: asserts
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; CHECK: [[R0:%[0-9]+]]:intregs = A2_tfrsi 0
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; CHECK-NEXT: predregs = C2_tfrrp killed [[R0]]:intregs
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