fwk: azalea: fix temp readout fail

Azalea support virtual wire index 33h for AMD zstate.
Unable to read temperature through i2c when entering low power state.
EC can only resume CPU temperature polling no sooner than 5ms after
exit from low power state

BRANCH=fwk-lotus-azalea-19573
BUG=https://app.clickup.com/t/86eq8nzqf
TEST= check didn't read the value over I2C when entering Z8 state

Signed-off-by: johnwc_yeh <[email protected]>

Author: JohnWC-Yeh

driver/sb_rmi.c

@@ -111,7 +111,7 @@ int sb_rmi_mailbox_xfer(int cmd, uint32_t msg_in, uint32_t *msg_out_ptr)
 	const int ap_comm_failure_threshold = 2;
 	static int ap_comm_failure_count;
 
-	if (!chipset_in_state(CHIPSET_STATE_ON))
+	if (!chipset_in_state(CHIPSET_STATE_ON) || chipset_in_low_power_mode())
 		return EC_ERROR_NOT_POWERED;
 
 	/**
@@ -270,7 +270,7 @@ int sb_rmi_mailbox_xfer(int cmd, uint32_t msg_in, uint32_t *msg_out_ptr)
 	const int ap_comm_failure_threshold = 2;
 	static int ap_comm_failure_count;
 
-	if (!chipset_in_state(CHIPSET_STATE_ON))
+	if (!chipset_in_state(CHIPSET_STATE_ON) || chipset_in_low_power_mode())
 		return EC_ERROR_NOT_POWERED;
 
 	mutex_lock(&sb_rmi_mutex);

driver/temp_sensor/sb_tsi.c

@@ -30,7 +30,7 @@ int sb_tsi_get_val(int idx, int *temp_ptr)
 	if (idx != 0)
 		return EC_ERROR_PARAM1;
 	/* FT4 SB-TSI sensor only powered in S0 */
-	if (!chipset_in_state(CHIPSET_STATE_ON))
+	if (!chipset_in_state(CHIPSET_STATE_ON) || chipset_in_low_power_mode())
 		return EC_ERROR_NOT_POWERED;
 	/* Read the value over I2C */
 	ret = raw_read8(SB_TSI_TEMP_H, temp_ptr);

include/chipset.h

@@ -251,6 +251,21 @@ __override_proto enum critical_shutdown
 board_system_is_idle(uint64_t last_shutdown_time, uint64_t *target,
 		     uint64_t now);
 
+/**
+ * Check if chipset is in low power mode
+ *
+ * Newer AMD SoCs support modern standby as well as the AMD version of runtime
+ * low power states. To coordinate these runtime low-power states with EC, the
+ * APU communicates the transition through the eSPI virtual wires. On transition
+ * to the low power state, APU transmits the corresponding virtual wire to EC.
+ * Any downstream transaction to EC or assertion of ESPI_ALERT# is treated as exit
+ * from the low power state.
+ * Sequence for all low power state (modern standby/SLP_MSC, Z8/9/10) are identical.
+ *
+ * @return non-zero if the chipset is in low power mode
+ */
+__override_proto int chipset_in_low_power_mode(void);
+
 #ifdef CONFIG_CMD_AP_RESET_LOG
 
 /**

power/common.c

@@ -1152,6 +1152,11 @@ static void preserve_enable_5v_state(void)
 DECLARE_HOOK(HOOK_SYSJUMP, preserve_enable_5v_state, HOOK_PRIO_DEFAULT);
 #endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
 
+__overridable int chipset_in_low_power_mode(void)
+{
+	return false;
+}
+
 #ifdef CONFIG_POWERSEQ_FAKE_CONTROL
 static int command_power_fake(int argc, const char **argv)
 {

zephyr/program/framework/azalea/src/stt.c

@@ -10,6 +10,8 @@
 #include "temp_sensor/pct2075.h"
 #include "temp_sensor/temp_sensor.h"
 
+#define NPCX_ESPI_VWEVSM_ADDR  ((volatile uint32_t *)0x4000a160)
+
 int board_get_soc_temp_mk(int *temp_mk)
 {
 	if (chipset_in_state(CHIPSET_STATE_HARD_OFF))
@@ -27,3 +29,19 @@ int board_get_ambient_temp_mk(int *temp_mk)
 	return f75303_get_val_mk(
 		F75303_SENSOR_ID(DT_NODELABEL(ddr_f75303)), temp_mk);
 }
+
+__override int chipset_in_low_power_mode(void)
+{
+	volatile uint32_t *address;
+	uint32_t val;
+	bool in_low_power_mode = false;
+
+	address = NPCX_ESPI_VWEVSM_ADDR;
+	/* Get Wire field */
+	val = *address & 0x0F;
+
+	if (val != 0)
+		in_low_power_mode = true;
+
+	return in_low_power_mode;
+}