Chips not saving properly when chip doesn't have input AND output.

[BappoHotels]

Expanding on issue #48, when chips don't have an input and an output, not only do connections from such chips get lost, but in my experience, some gates within those chips cease to function entirely. I've created a 2 minute demo video showing this bug in action. I could be wrong about the reasoning for this, but I don't believe this to be the case.

What I neglected to show in the video is that, upon viewing the chip, the OR gate, assuming it had any signals being sent in, would also not provide an output unless I deleted it and placed a new one.

Edit: I've replaced the video link with a rendered version so that the audio track for my microphone is included.

[VitoBarra]

this is for this and issue #48
there are more problems with this than I initially expected. In addition to the issues pointed out, there is also a problem when trying to edit a chip with a clock in it. when I tried to edit a chip with a clock in it while editing another chip, things broke

this is me trying to edit a chip with a clock in it while I'm editing some other chip, you can see it by the name of the chip on the right.

so there is a problem in loading the chip with a clock in general. I will check it out probably next month, for now, I want to leave a clarification.

beyond the bug. The clock isn't meant to be used in that way. currently, the simulation can only run the clock when it is in edit mode, and cannot save the value of the clock set. While it is possible to change this with enough work, I do not think it should be done. this is because you should instead design reusable chips with a clock input. in that way, you can design systems that can be synchronized by the same clock

I hope this helps, and thank you for the issue