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[reggen] Remove the devmode input
As discussed on lowRISC#10311 we are removing the devmode input signal from the codebase, since it has been decided that this will not be used. Signed-off-by: Michael Schaffner <[email protected]>
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‎doc/contributing/hw/comportability/README.md

-6
Original file line numberDiff line numberDiff line change
@@ -114,12 +114,6 @@ In this diagram the auto-generated register submodule is shown within the periph
114114
This register block communicates with the rest of the peripheral logic to manage configuration and status communication with software.
115115
Also shown is the mandatory clock, and the optional bus (TL-UL) host, interrupts, alerts, and chip IO.
116116

117-
Additionally an optional input `devmode` is shown which represents an indication to the peripheral what mode the SOC is operating in.
118-
For now this includes only two modes: development (`devmode = 1`) and production (`devmode = 0`).
119-
This is the beginning of a security feature that will convey the full life cycle mode status to the peripheral.
120-
In its current form, only the distinction of development mode vs. production mode is required in order to determine how to handle software errors (see the [Register Tooling](../../../../util/reggen/README.md) documentation for details).
121-
The full definition of life cycle modes will come upon further refinement of the security properties of the SOC.
122-
123117
## Peripheral Feature Details
124118

125119
### Configuration File

‎hw/dv/doc/dv_doc_template.md

-1
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,6 @@ In addition, it instantiates the following interfaces and sets their handle into
4242
* FOO IOs
4343
* Interrupts ([`pins_if`](../sv/common_ifs/README.md))
4444
* Alerts ([`pins_if`](../sv/common_ifs/README.md))
45-
* Devmode ([`pins_if`](../sv/common_ifs/README.md))
4645

4746
### Common DV utility components
4847
The following utilities provide generic helper tasks and functions to perform activities that are common across the project:

‎hw/dv/sv/cip_lib/README.md

-2
Original file line numberDiff line numberDiff line change
@@ -59,8 +59,6 @@ The following is a list of common features and settings:
5959
many as the DUT provides. The reason for going with a fixed width pins_if is
6060
to allow the intr_vif to be available in this base env cfg class (which does not
6161
know how many interrupt each IP DUT provides).
62-
* **devmode_vif**: This is a handle to the `pins_if #(1)` interface instance created
63-
in the tb to hookup the DUT input `devmode`.
6462
* **tl_agent_cfg**: The downstream TileLink host agent created in the cip_base_env
6563
class requires the agent cfg handle to tell it how to configure the agent.
6664
* **alert_agent_cfgs**: Similar to tl_agent_cfg, the downstream alert device agent

‎hw/dv/sv/cip_lib/cip_base_env.sv

-4
Original file line numberDiff line numberDiff line change
@@ -29,10 +29,6 @@ class cip_base_env #(type CFG_T = cip_base_env_cfg,
2929
cfg.num_interrupts > 0) begin
3030
`uvm_fatal(get_full_name(), "failed to get intr_vif from uvm_config_db")
3131
end
32-
if (cfg.has_devmode && !uvm_config_db#(devmode_vif)::get(this, "", "devmode_vif",
33-
cfg.devmode_vif)) begin
34-
`uvm_fatal(get_full_name(), "failed to get devmode_vif from uvm_config_db")
35-
end
3632

3733
// Only get rst_shadowed_vif if it is an IP level testbench,
3834
// and the IP contains shadowed registers.

‎hw/dv/sv/cip_lib/cip_base_env_cfg.sv

-6
Original file line numberDiff line numberDiff line change
@@ -46,15 +46,9 @@ class cip_base_env_cfg #(type RAL_T = dv_base_reg_block) extends dv_base_env_cfg
4646

4747
// Common interfaces - interrupts, alerts, edn clk.
4848
intr_vif intr_vif;
49-
devmode_vif devmode_vif;
5049
rst_shadowed_vif rst_shadowed_vif;
5150
virtual clk_rst_if edn_clk_rst_vif;
5251

53-
// en_devmode default sets to 1 because all IPs' devmode_i is tied off internally to 1
54-
// ICEBOX(#16739): enable random drive devmode once design supports
55-
bit has_devmode = 1;
56-
bit en_devmode = 1;
57-
5852
// If the data intg is passthru for the memory and the data intg value in mem is incorrect, it
5953
// won't trigger d_error in this mem block and the check is done in the processor
6054
// User can set this flag to disable the check for d_user.data_intg

‎hw/dv/sv/cip_lib/cip_base_scoreboard.sv

+1-4
Original file line numberDiff line numberDiff line change
@@ -389,10 +389,7 @@ class cip_base_scoreboard #(type RAL_T = dv_base_reg_block,
389389

390390
unmapped_err = !is_tl_access_mapped_addr(item, ral_name);
391391
if (unmapped_err) begin
392-
// if devmode is enabled, d_error will be set
393-
if (cfg.en_devmode || cfg.devmode_vif.sample()) begin
394-
exp_d_error = !cfg.ral_models[ral_name].get_unmapped_access_ok();
395-
end
392+
exp_d_error = !cfg.ral_models[ral_name].get_unmapped_access_ok();
396393
end
397394

398395
mem_access_err = !is_tl_mem_access_allowed(item, ral_name, mem_byte_access_err, mem_wo_err,

‎hw/dv/sv/dv_utils/dv_utils_pkg.sv

-1
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,6 @@ package dv_utils_pkg;
3636

3737
// typedef parameterized pins_if for ease of implementation for interrupts and alerts
3838
typedef virtual pins_if #(NUM_MAX_INTERRUPTS) intr_vif;
39-
typedef virtual pins_if #(1) devmode_vif;
4039

4140
// interface direction / mode - Host or Device
4241
typedef enum bit {

‎hw/dv/tools/dvsim/testplans/tl_device_access_types_wo_intg_testplan.hjson

+1-1
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@
2323
- address and size aren't aligned, e.g. `a_address = 0x01`, `a_size != 0`
2424
- size is greater than 2
2525
- OpenTitan defined error cases
26-
- access unmapped address, expect `d_error = 1` when `devmode_i == 1`
26+
- access unmapped address, expect `d_error = 1`
2727
- write a CSR with unaligned address, e.g. `a_address[1:0] != 0`
2828
- write a CSR less than its width, e.g. when CSR is 2 bytes wide, only write 1 byte
2929
- write a memory with `a_mask != '1` when it doesn't support partial accesses

‎hw/ip/adc_ctrl/dv/tb.sv

-3
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,6 @@ module tb;
4141

4242
wire clk, rst_n;
4343
wire clk_aon, rst_aon_n;
44-
wire devmode;
4544
wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
4645
wire wakeup_req;
4746
wire [ADC_CTRL_CHANNELS - 1 : 0] adc_channel_sel, adc_data_valid;
@@ -74,7 +73,6 @@ module tb;
7473
);
7574
pins_if #(NUM_MAX_INTERRUPTS) intr_if (interrupts);
7675
pins_if #(1) wakeup_if (wakeup_req);
77-
pins_if #(1) devmode_if (devmode);
7876
tl_if tl_if (
7977
.clk (clk),
8078
.rst_n(rst_n)
@@ -113,7 +111,6 @@ module tb;
113111
uvm_config_db#(virtual clk_rst_if)::set(null, "*.env", "clk_aon_rst_vif", clk_aon_rst_if);
114112
uvm_config_db#(intr_vif)::set(null, "*.env", "intr_vif", intr_if);
115113
uvm_config_db#(wakeup_vif_t)::set(null, "*.env", "wakeup_vif", wakeup_if);
116-
uvm_config_db#(devmode_vif)::set(null, "*.env", "devmode_vif", devmode_if);
117114
uvm_config_db#(virtual tl_if)::set(null, "*.env.m_tl_agent*", "vif", tl_if);
118115
$timeformat(-12, 0, " ps", 12);
119116
run_test();

‎hw/ip/adc_ctrl/rtl/adc_ctrl.sv

+1-2
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,7 @@ module adc_ctrl
7575
.reg2hw(reg2hw),
7676
.hw2reg(hw2reg),
7777
// SEC_CM: BUS.INTEGRITY
78-
.intg_err_o(alerts[0]),
79-
.devmode_i(1'b1)
78+
.intg_err_o(alerts[0])
8079
);
8180

8281
// Instantiate DCD core module

‎hw/ip/adc_ctrl/rtl/adc_ctrl_reg_top.sv

+2-5
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,7 @@ module adc_ctrl_reg_top (
1818
input adc_ctrl_reg_pkg::adc_ctrl_hw2reg_t hw2reg, // Read
1919

2020
// Integrity check errors
21-
output logic intg_err_o,
22-
23-
// Config
24-
input devmode_i // If 1, explicit error return for unmapped register access
21+
output logic intg_err_o
2522
);
2623

2724
import adc_ctrl_reg_pkg::* ;
@@ -121,7 +118,7 @@ module adc_ctrl_reg_top (
121118
// cdc oversampling signals
122119

123120
assign reg_rdata = reg_rdata_next ;
124-
assign reg_error = (devmode_i & addrmiss) | wr_err | intg_err;
121+
assign reg_error = addrmiss | wr_err | intg_err;
125122

126123
// Define SW related signals
127124
// Format: <reg>_<field>_{wd|we|qs}

‎hw/ip/aes/dv/tb/tb.sv

-3
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,6 @@ module tb;
1414
`include "dv_macros.svh"
1515

1616
wire clk, rst_n, rst_shadowed_n;
17-
wire devmode;
1817
wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
1918
wire edn_req;
2019
wire [$bits(lc_ctrl_pkg::lc_tx_t) : 0] lc_escalate;
@@ -29,7 +28,6 @@ module tb;
2928
rst_shadowed_if rst_shadowed_if(.rst_n(rst_n), .rst_shadowed_n(rst_shadowed_n));
3029
pins_if #(NUM_MAX_INTERRUPTS) intr_if(interrupts);
3130

32-
pins_if #(1) devmode_if(devmode);
3331
pins_if #($bits(lc_escalate)) lc_escalate_if (lc_escalate);
3432
pins_if #(1) idle_if (idle);
3533
tl_if tl_if(.clk(clk), .rst_n(rst_n));
@@ -79,7 +77,6 @@ module tb;
7977
uvm_config_db#(virtual rst_shadowed_if)::set(null, "*.env", "rst_shadowed_vif",
8078
rst_shadowed_if);
8179
uvm_config_db#(intr_vif)::set(null, "*.env", "intr_vif", intr_if);
82-
uvm_config_db#(devmode_vif)::set(null, "*.env", "devmode_vif", devmode_if);
8380
uvm_config_db#(virtual tl_if)::set(null, "*.env.m_tl_agent*", "vif", tl_if);
8481
uvm_config_db#(virtual aes_cov_if)::set(null, "*.env", "aes_cov_if", dut.u_aes_cov_if );
8582
uvm_config_db#(virtual key_sideload_if)

‎hw/ip/aes/rtl/aes.sv

+1-2
Original file line numberDiff line numberDiff line change
@@ -104,8 +104,7 @@ module aes
104104
.hw2reg,
105105
.shadowed_storage_err_o(shadowed_storage_err),
106106
.shadowed_update_err_o(shadowed_update_err),
107-
.intg_err_o(intg_err_alert),
108-
.devmode_i(1'b1)
107+
.intg_err_o(intg_err_alert)
109108
);
110109

111110
// SEC_CM: LC_ESCALATE_EN.INTERSIG.MUBI

‎hw/ip/aes/rtl/aes_reg_top.sv

+2-5
Original file line numberDiff line numberDiff line change
@@ -20,10 +20,7 @@ module aes_reg_top (
2020
output logic shadowed_update_err_o,
2121

2222
// Integrity check errors
23-
output logic intg_err_o,
24-
25-
// Config
26-
input devmode_i // If 1, explicit error return for unmapped register access
23+
output logic intg_err_o
2724
);
2825

2926
import aes_reg_pkg::* ;
@@ -123,7 +120,7 @@ module aes_reg_top (
123120
// cdc oversampling signals
124121

125122
assign reg_rdata = reg_rdata_next ;
126-
assign reg_error = (devmode_i & addrmiss) | wr_err | intg_err;
123+
assign reg_error = addrmiss | wr_err | intg_err;
127124

128125
// Define SW related signals
129126
// Format: <reg>_<field>_{wd|we|qs}

‎hw/ip/aon_timer/dv/env/aon_timer_env_cfg.sv

-3
Original file line numberDiff line numberDiff line change
@@ -16,9 +16,6 @@ class aon_timer_env_cfg extends cip_base_env_cfg #(.RAL_T(aon_timer_reg_block));
1616

1717
function new (string name="");
1818
super.new(name);
19-
20-
// The aon_timer RTL doesn't support a devmode input at the moment.
21-
has_devmode = 1'b0;
2219
endfunction : new
2320

2421
virtual function void initialize(bit [31:0] csr_base_addr = '1);

‎hw/ip/aon_timer/rtl/aon_timer.sv

+1-2
Original file line numberDiff line numberDiff line change
@@ -97,8 +97,7 @@ module aon_timer import aon_timer_reg_pkg::*;
9797
.hw2reg,
9898

9999
// SEC_CM: BUS.INTEGRITY
100-
.intg_err_o (alerts[0]),
101-
.devmode_i (1'b1)
100+
.intg_err_o (alerts[0])
102101
);
103102

104103
////////////

‎hw/ip/aon_timer/rtl/aon_timer_reg_top.sv

+2-5
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,7 @@ module aon_timer_reg_top (
1818
input aon_timer_reg_pkg::aon_timer_hw2reg_t hw2reg, // Read
1919

2020
// Integrity check errors
21-
output logic intg_err_o,
22-
23-
// Config
24-
input devmode_i // If 1, explicit error return for unmapped register access
21+
output logic intg_err_o
2522
);
2623

2724
import aon_timer_reg_pkg::* ;
@@ -121,7 +118,7 @@ module aon_timer_reg_top (
121118
// cdc oversampling signals
122119

123120
assign reg_rdata = reg_rdata_next ;
124-
assign reg_error = (devmode_i & addrmiss) | wr_err | intg_err;
121+
assign reg_error = addrmiss | wr_err | intg_err;
125122

126123
// Define SW related signals
127124
// Format: <reg>_<field>_{wd|we|qs}

‎hw/ip/clkmgr/data/clkmgr.sv.tpl

+1-2
Original file line numberDiff line numberDiff line change
@@ -194,8 +194,7 @@ from topgen.lib import Name
194194
.shadowed_storage_err_o(hw2reg.fatal_err_code.shadow_storage_err.de),
195195
.shadowed_update_err_o(hw2reg.recov_err_code.shadow_update_err.de),
196196
// SEC_CM: BUS.INTEGRITY
197-
.intg_err_o(hw2reg.fatal_err_code.reg_intg.de),
198-
.devmode_i(1'b1)
197+
.intg_err_o(hw2reg.fatal_err_code.reg_intg.de)
199198
);
200199
assign hw2reg.fatal_err_code.reg_intg.d = 1'b1;
201200
assign hw2reg.recov_err_code.shadow_update_err.d = 1'b1;

‎hw/ip/clkmgr/dv/README.md

-2
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,6 @@ In addition, it instantiates the following interfaces, connects them to the DUT
3131
* [TileLink host interface](../../../dv/sv/tl_agent/README.md)
3232
* CLKMGR IOs: `hw/ip/clkmgr/dv/env/clkmgr_if.sv`
3333

34-
The Devmode ([`pins_if`](../../../dv/sv/common_ifs/README.md)) interface should be connected once the RTL adds support for it.
35-
3634
### Common DV utility components
3735
The following utilities provide generic helper tasks and functions to perform activities that are common across the project:
3836

‎hw/ip/clkmgr/dv/tb.sv

-5
Original file line numberDiff line numberDiff line change
@@ -53,10 +53,6 @@ module tb;
5353
.rst_n(rst_root_usb_n)
5454
);
5555

56-
57-
// This is yet to be connected.
58-
wire devmode;
59-
pins_if #(1) devmode_if (devmode);
6056
tl_if tl_if (
6157
.clk (clk),
6258
.rst_n(rst_n)
@@ -205,7 +201,6 @@ module tb;
205201
// FIXME Un-comment this once interrupts are created for this ip.
206202
// uvm_config_db#(intr_vif)::set(null, "*.env", "intr_vif", intr_if);
207203

208-
uvm_config_db#(devmode_vif)::set(null, "*.env", "devmode_vif", devmode_if);
209204
uvm_config_db#(virtual tl_if)::set(null, "*.env.m_tl_agent*", "vif", tl_if);
210205
uvm_config_db#(virtual rst_shadowed_if)::set(null, "*.env", "rst_shadowed_vif",
211206
rst_shadowed_if);

‎hw/ip/clkmgr/rtl/clkmgr.sv

+1-2
Original file line numberDiff line numberDiff line change
@@ -51,8 +51,7 @@ module clkmgr import clkmgr_pkg::*; (
5151
.tl_i,
5252
.tl_o,
5353
.reg2hw,
54-
.hw2reg,
55-
.devmode_i(1'b1)
54+
.hw2reg
5655
);
5756

5857

‎hw/ip/clkmgr/rtl/clkmgr_reg_top.sv

+2-5
Original file line numberDiff line numberDiff line change
@@ -16,10 +16,7 @@ module clkmgr_reg_top (
1616
input clkmgr_reg_pkg::clkmgr_hw2reg_t hw2reg, // Read
1717

1818
// Integrity check errors
19-
output logic intg_err_o,
20-
21-
// Config
22-
input devmode_i // If 1, explicit error return for unmapped register access
19+
output logic intg_err_o
2320
);
2421

2522
import clkmgr_reg_pkg::* ;
@@ -119,7 +116,7 @@ module clkmgr_reg_top (
119116
// cdc oversampling signals
120117

121118
assign reg_rdata = reg_rdata_next ;
122-
assign reg_error = (devmode_i & addrmiss) | wr_err | intg_err;
119+
assign reg_error = addrmiss | wr_err | intg_err;
123120

124121
// Define SW related signals
125122
// Format: <reg>_<field>_{wd|we|qs}

‎hw/ip/csrng/dv/README.md

-1
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,6 @@ In addition, it instantiates the following interfaces, connects them to the DUT
2929
* CSRNG IOs
3030
* Interrupts ([`pins_if`](../../../dv/sv/common_ifs/README.md)
3131
* Alerts ([`pins_if`](../../../dv/sv/common_ifs/README.md)
32-
* Devmode ([`pins_if`](../../../dv/sv/common_ifs/README.md)
3332

3433
### Common DV utility components
3534
The following utilities provide generic helper tasks and functions to perform activities that are common across the project:

‎hw/ip/csrng/dv/tb.sv

+1-3
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@ module tb;
1414
`include "uvm_macros.svh"
1515
`include "dv_macros.svh"
1616

17-
wire clk, rst_n, devmode;
17+
wire clk, rst_n;
1818
wire edn_disable, entropy_src_disable;
1919
wire intr_cmd_req_done;
2020
wire intr_entropy_req;
@@ -29,7 +29,6 @@ module tb;
2929
// interfaces
3030
clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
3131
pins_if#(NUM_MAX_INTERRUPTS) intr_if(interrupts);
32-
pins_if#(1) devmode_if(devmode);
3332
pins_if#(MuBi8Width) otp_en_cs_sw_app_read_if(otp_en_cs_sw_app_read);
3433
pins_if#(MuBi4Width) lc_hw_debug_en_if(lc_hw_debug_en);
3534
tl_if tl_if(.clk(clk), .rst_n(rst_n));
@@ -103,7 +102,6 @@ module tb;
103102
clk_rst_if.set_active();
104103
uvm_config_db#(virtual clk_rst_if)::set(null, "*.env", "clk_rst_vif", clk_rst_if);
105104
uvm_config_db#(intr_vif)::set(null, "*.env", "intr_vif", intr_if);
106-
uvm_config_db#(devmode_vif)::set(null, "*.env", "devmode_vif", devmode_if);
107105
uvm_config_db#(virtual pins_if#(MuBi8Width))::set(null, "*.env", "otp_en_cs_sw_app_read_vif",
108106
otp_en_cs_sw_app_read_if);
109107
uvm_config_db#(virtual pins_if#(MuBi4Width))::set(null, "*.env", "lc_hw_debug_en_vif",

‎hw/ip/csrng/rtl/csrng.sv

+1-2
Original file line numberDiff line numberDiff line change
@@ -72,8 +72,7 @@ module csrng
7272
.tl_o,
7373
.reg2hw,
7474
.hw2reg,
75-
.intg_err_o(intg_err_alert[1]),
76-
.devmode_i(1'b1)
75+
.intg_err_o(intg_err_alert[1])
7776
);
7877

7978
csrng_core #(

‎hw/ip/csrng/rtl/csrng_reg_top.sv

+2-5
Original file line numberDiff line numberDiff line change
@@ -16,10 +16,7 @@ module csrng_reg_top (
1616
input csrng_reg_pkg::csrng_hw2reg_t hw2reg, // Read
1717

1818
// Integrity check errors
19-
output logic intg_err_o,
20-
21-
// Config
22-
input devmode_i // If 1, explicit error return for unmapped register access
19+
output logic intg_err_o
2320
);
2421

2522
import csrng_reg_pkg::* ;
@@ -119,7 +116,7 @@ module csrng_reg_top (
119116
// cdc oversampling signals
120117

121118
assign reg_rdata = reg_rdata_next ;
122-
assign reg_error = (devmode_i & addrmiss) | wr_err | intg_err;
119+
assign reg_error = addrmiss | wr_err | intg_err;
123120

124121
// Define SW related signals
125122
// Format: <reg>_<field>_{wd|we|qs}

‎hw/ip/edn/dv/README.md

-1
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,6 @@ In addition, it instantiates the following interfaces, connects them to the DUT
2929
* EDN IOs
3030
* Interrupts ([`pins_if`](../../../dv/sv/common_ifs/README.md)
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* Alerts ([`pins_if`](../../../dv/sv/common_ifs/README.md)
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* Devmode ([`pins_if`](../../../dv/sv/common_ifs/README.md)
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### Common DV utility components
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The following utilities provide generic helper tasks and functions to perform activities that are common across the project:

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