@@ -505,6 +505,12 @@ Texas Instruments has an adapter called @b{ICDI}.
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It is not to be confused with the FTDI based adapters that were originally fitted to their
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evaluation boards. This is the adapter fitted to the Stellaris LaunchPad.
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+ @section USB Nuvoton Nu-Link
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+ Nuvoton has an adapter called @b {Nu-Link }.
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+ It is available either as stand-alone dongle and embedded on development boards.
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+ It supports SWD, serial port bridge and mass storage for firmware update.
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+ Both Nu-Link v1 and v2 are supported.
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+
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@section USB CMSIS-DAP based
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ARM has released a interface standard called CMSIS-DAP that simplifies connecting
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debuggers to ARM Cortex based targets @url {http://www.keil.com/support/man/docs/dapdebug/dapdebug_introduction.htm }.
@@ -609,6 +615,12 @@ produced, PDF schematics are easily found and it is easy to make.
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@* A JTAG driver acting as a client for the JTAG VPI server interface.
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@* Link: @url {http://github.com/fjullien/jtag_vpi }
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+ @item @b {jtag_dpi }
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+ @* A JTAG driver acting as a client for the SystemVerilog Direct Programming
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+ Interface (DPI) for JTAG devices. DPI allows OpenOCD to connect to the JTAG
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+ interface of a hardware model written in SystemVerilog, for example, on an
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+ emulation model of target hardware.
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+
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@item @b {xlnx_pcie_xvc }
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@* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG/SWD interface.
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@@ -712,8 +724,11 @@ Configuration files and scripts are searched for in
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@item the current directory,
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@item any search dir specified on the command line using the @option {-s } option,
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@item any search dir specified using the @command {add_script_search_dir } command,
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- @item @file {$HOME/.openocd } (not on Windows),
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@item a directory in the @env {OPENOCD_SCRIPTS } environment variable (if set),
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+ @item @file {%APPDATA%/OpenOCD } (only on Windows),
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+ @item @file {$HOME/Library/Preferences/org.openocd } (only on Darwin),
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+ @item @file {$XDG_CONFIG_HOME/openocd } (@env {$XDG_CONFIG_HOME } defaults to @file {$HOME/.config }),
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+ @item @file {$HOME/.openocd },
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@item the site wide script library @file {$pkgdatadir/site } and
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@item the OpenOCD-supplied script library @file {$pkgdatadir/scripts }.
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@end enumerate
@@ -3064,7 +3079,8 @@ This is a driver that supports multiple High Level Adapters.
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This type of adapter does not expose some of the lower level api's
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that OpenOCD would normally use to access the target.
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- Currently supported adapters include the STMicroelectronics ST-LINK and TI ICDI.
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+ Currently supported adapters include the STMicroelectronics ST-LINK, TI ICDI
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+ and Nuvoton Nu-Link.
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ST-LINK firmware version >= V2.J21.S4 recommended due to issues with earlier
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versions of firmware where serial number is reset after first use. Suggest
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using ST firmware update utility to upgrade ST-LINK firmware even if current
@@ -3078,7 +3094,7 @@ Currently Not Supported.
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Specifies the serial number of the adapter.
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@end deffn
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- @deffn {Config Command} {hla_layout} ( @option {stlink }| @option {icdi })
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+ @deffn {Config Command} {hla_layout} ( @option {stlink }| @option {icdi }| @option { nulink } )
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Specifies the adapter layout to use.
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@end deffn
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@@ -3228,6 +3244,22 @@ This value is only used with the standard variant.
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@end deffn
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@end deffn
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+
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+ @deffn {Interface Driver} {jtag_dpi}
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+ SystemVerilog Direct Programming Interface (DPI) compatible driver for
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+ JTAG devices in emulation. The driver acts as a client for the SystemVerilog
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+ DPI server interface.
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+
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+ @deffn {Config Command} {jtag_dpi_set_port} port
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+ Specifies the TCP/IP port number of the SystemVerilog DPI server interface.
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+ @end deffn
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+
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+ @deffn {Config Command} {jtag_dpi_set_address} address
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+ Specifies the TCP/IP address of the SystemVerilog DPI server interface.
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+ @end deffn
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+ @end deffn
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+
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+
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@section Transport Configuration
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@cindex Transport
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As noted earlier, depending on the version of OpenOCD you use,
@@ -9342,6 +9374,12 @@ target code relies on. In a configuration file, the command would typically be c
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However, normally it is not necessary to use the command at all.
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@end deffn
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+ @deffn Command {aarch64 disassemble} address [count]
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+ @cindex disassemble
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+ Disassembles @var {count } instructions starting at @var {address }.
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+ If @var {count } is not specified, a single instruction is disassembled.
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+ @end deffn
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+
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@deffn Command {aarch64 smp} [on|off]
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Display, enable or disable SMP handling mode. The state of SMP handling influences the way targets in an SMP group
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are handled by the run control. With SMP handling enabled, issuing halt or resume to one core will trigger
@@ -9676,8 +9714,31 @@ This is used to access 64-bit floating point registers on 32-bit targets.
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@end deffn
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@deffn Command {riscv set_prefer_sba} on|off
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- When on, prefer to use System Bus Access to access memory. When off, prefer to
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- use the Program Buffer to access memory.
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+ When on, prefer to use System Bus Access to access memory. When off (default),
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+ prefer to use the Program Buffer to access memory.
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+ @end deffn
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+
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+ @deffn Command {riscv set_enable_virtual} on|off
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+ When on, memory accesses are performed on physical or virtual memory depending
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+ on the current system configuration. When off (default), all memory accessses are performed
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+ on physical memory.
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+ @end deffn
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+
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+ @deffn Command {riscv set_enable_virt2phys} on|off
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+ When on (default), memory accesses are performed on physical or virtual memory
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+ depending on the current satp configuration. When off, all memory accessses are
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+ performed on physical memory.
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+ @end deffn
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+
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+ @deffn Command {riscv resume_order} normal|reversed
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+ Some software assumes all harts are executing nearly continuously. Such
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+ software may be sensitive to the order that harts are resumed in. On harts
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+ that don't support hasel, this option allows the user to choose the order the
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+ harts are resumed in. If you are using this option, it's probably masking a
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+ race condition problem in your code.
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+
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+ Normal order is from lowest hart index to highest. This is the default
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+ behavior. Reversed order is from highest hart index to lowest.
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@end deffn
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@deffn Command {riscv set_ir} ( @option {idcode }| @option {dtmcs }| @option {dmi }) [value]
@@ -9691,6 +9752,26 @@ When utilizing version 0.11 of the RISC-V Debug Specification,
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and DBUS registers, respectively.
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@end deffn
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+ @deffn Command {riscv use_bscan_tunnel} value
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+ Enable or disable use of a BSCAN tunnel to reach DM. Supply the width of
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+ the DM transport TAP's instruction register to enable. Supply a value of 0 to disable.
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+ @end deffn
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+
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+ @deffn Command {riscv set_ebreakm} on|off
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+ Control dcsr.ebreakm. When on (default), M-mode ebreak instructions trap to
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+ OpenOCD. When off, they generate a breakpoint exception handled internally.
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+ @end deffn
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+
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+ @deffn Command {riscv set_ebreaks} on|off
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+ Control dcsr.ebreaks. When on (default), S-mode ebreak instructions trap to
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+ OpenOCD. When off, they generate a breakpoint exception handled internally.
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+ @end deffn
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+
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+ @deffn Command {riscv set_ebreaku} on|off
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+ Control dcsr.ebreaku. When on (default), U-mode ebreak instructions trap to
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+ OpenOCD. When off, they generate a breakpoint exception handled internally.
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+ @end deffn
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+
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@subsection RISC-V Authentication Commands
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The following commands can be used to authenticate to a RISC-V system. Eg. a
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The following commands allow direct access to the Debug Module Interface, which
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can be used to interact with custom debug features.
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- @deffn Command {riscv dmi_read}
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+ @deffn Command {riscv dmi_read} address
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Perform a 32-bit DMI read at address, returning the value.
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@end deffn
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