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Merge pull request #15458 from MultiTechSystems/xdot-max32670
Add target support for XDOT_MAX32670
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‎targets/TARGET_Maxim/TARGET_MAX32670/TARGET_XDOT_MAX32670/CMakeLists.txt

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add_library(mbed-xdot-max32670 INTERFACE)
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target_include_directories(mbed-xdot-max32670
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INTERFACE
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.
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)
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target_link_libraries(mbed-xdot-max32670
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INTERFACE
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mbed-max32670
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)
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target_sources(mbed-xdot-max32670
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INTERFACE
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SystemInit.c
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)

‎targets/TARGET_Maxim/TARGET_MAX32670/TARGET_XDOT_MAX32670/PeripheralNames.h

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/*******************************************************************************
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* Copyright (C) Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*******************************************************************************
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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UART_0 = MXC_BASE_UART0,
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UART_1 = MXC_BASE_UART1,
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UART_2 = MXC_BASE_UART2,
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UART_3 = MXC_BASE_UART3,
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#if defined(MBED_CONF_TARGET_STDIO_UART)
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STDIO_UART = MBED_CONF_TARGET_STDIO_UART,
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#else
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STDIO_UART = UART_0,
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#endif
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} UARTName;
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typedef enum {
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I2C_0 = MXC_BASE_I2C0,
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I2C_1 = MXC_BASE_I2C1,
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I2C_2 = MXC_BASE_I2C2,
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} I2CName;
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typedef enum {
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SPI_0 = MXC_BASE_SPI0,
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SPI_1 = MXC_BASE_SPI1,
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SPI_2 = MXC_BASE_SPI2,
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} SPIName;
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#ifdef __cplusplus
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}
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#endif
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#endif

‎targets/TARGET_Maxim/TARGET_MAX32670/TARGET_XDOT_MAX32670/PinNames.h

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/*******************************************************************************
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* Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8+
* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
28+
* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*******************************************************************************
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*/
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/* MBED TARGET LIST: MAX32670EVKIT */
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#ifndef MBED_PINNAMES_H
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#define MBED_PINNAMES_H
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#include "cmsis.h"
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#include "gpio_regs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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PIN_INPUT = 0,
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PIN_OUTPUT = 1
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} PinDirection;
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#define PORT_SHIFT 12
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#define PINNAME_TO_PORT(name) ((unsigned int)(name) >> PORT_SHIFT)
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#define PINNAME_TO_PIN(name) ((unsigned int)(name) & ~(0xFFFFFFFF << PORT_SHIFT))
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#define NOT_CONNECTED (int)0xFFFFFFFF
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typedef enum {
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// Port 0
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P0_0 = (0 << PORT_SHIFT),
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P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15,
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P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23,P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31,
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// Port 1
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P1_0 = (1 << PORT_SHIFT),
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P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15,
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P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23,P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31,
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// USB bridge connected UART pins
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#if defined(MBED_CONF_TARGET_STDIO_UART_TX)
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CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX,
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#else
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CONSOLE_TX = P0_29,
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#endif // MBED_CONF_TARGET_STDIO_UART_TX
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#if defined(MBED_CONF_TARGET_STDIO_UART_RX)
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CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX,
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#else
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CONSOLE_RX = P0_28,
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#endif // MBED_CONF_TARGET_STDIO_UART_RX
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STDIO_UART_TX = CONSOLE_TX,
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STDIO_UART_RX = CONSOLE_RX,
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// ----- Start of xDot external pin definitions -----
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WAKE = P0_19,
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GPIO0 = P0_30,
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GPIO1 = P0_27,
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GPIO2 = P0_26,
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GPIO3 = P0_25,
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// AT command port UART
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UART_RX = P0_8,
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UART_TX = P0_9,
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UART_CTS = P0_10,
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UART_RTS = P0_11,
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UART0_RX = UART_RX,
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UART0_TX = UART_TX,
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UART0_CTS = UART_CTS,
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UART0_RTS = UART_RTS,
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// debug UART
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UART1_RX = P0_28,
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UART1_TX = P0_29,
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// SwD
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SWDIO = P0_0,
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SWCLK = P0_1,
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// I2C
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I2C1_SCL = P0_12,
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I2C1_SDA = P0_13,
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// SPI
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SPI0_SCK = P0_4,
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SPI0_MOSI = P0_3,
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SPI0_MISO = P0_2,
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SPI0_SS = P0_5,
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// ----- End of xDot external pin definitions -----
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// ----- Start of xDot dedicated internal pins. -----
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MEM_PWR_EN = P0_24, // Power to EEPROM, Flash & Secure element
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FLASH_CS = P0_23,
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// EEPROM and SE I2C
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I2C0_SCL = P0_6,
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I2C0_SDA = P0_7,
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SE_SDA = I2C0_SDA,
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SE_SCL = I2C0_SCL,
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// SX1262
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SPI1_SCK = P0_16,
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SPI1_MOSI = P0_15,
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SPI1_MISO = P0_14,
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SPI1_SS = P0_17,
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LORA_MISO = SPI1_MISO,
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LORA_MOSI = SPI1_MOSI,
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LORA_SCK = SPI1_SCK,
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LORA_NSS = SPI1_SS,
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LORA_RESET = P0_20,
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LORA_BUSY = P0_21,
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LORA_DIO1 = P0_22,
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RF_SW_CTRL = P0_18, // RF switch, active high
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// ----- End of xDot dedicated internal pins. -----
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// ----- Start of aliases for MAX32670 serial_api.c -----
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// The xDot does not use these serial UARTs or the serial_api
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// code. These pins are used on the xDot as detailed above.
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UART0B_RX = P0_24,
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UART0B_TX = P0_25,
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UART1B_RX = P0_2,
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UART1B_TX = P0_3,
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UART2B_RX = P0_14,
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UART2B_TX = P0_15,
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// ----- end of aliases for MAX32670 serial_api.c -----
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// Not connected
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NC = NOT_CONNECTED
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} PinName;
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#define LED1 P0_30
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#define I2C_SCL I2C1_SCL
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#define I2C_SDA I2C1_SDA
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#define SPI_MISO SPI0_MISO
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#define SPI_MOSI SPI0_MOSI
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#define SPI_SCK SPI0_SCK
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#define SPI_NSS SPI0_SS
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typedef enum {
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PullNone = 0,
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PullUp = 1,
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PullDown = 2,
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PullDefault = PullUp
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} PinMode;
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typedef enum {
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LED_ON = 0,
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LED_OFF = 1
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} LedStates;
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#ifdef __cplusplus
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}
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#endif
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#endif

‎targets/TARGET_Maxim/TARGET_MAX32670/TARGET_XDOT_MAX32670/SystemInit.c

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/* mbed Microcontroller Library
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*******************************************************************************
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* Copyright (c) 2023, MultiTech Systems
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of MultiTech nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "max32670.h"
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#include "gcr_regs.h"
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#include "mxc_sys.h"
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#include "pwrseq_regs.h"
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#define XDOT_ERFO_FREQ 24000000 // Change to 24000000 for xDot 1.5 Rev A
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void SystemCoreClockUpdateXdot(void)
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{
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uint32_t base_freq, div, clk_src;
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// Get the clock source and frequency
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clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL);
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switch (clk_src)
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{
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case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_EXTCLK:
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base_freq = EXTCLK_FREQ;
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break;
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case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERFO:
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base_freq = XDOT_ERFO_FREQ;
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break;
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case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_INRO:
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base_freq = INRO_FREQ;
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break;
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case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO:
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base_freq = IPO_FREQ;
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break;
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case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IBRO:
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base_freq = IBRO_FREQ;
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break;
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case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO:
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base_freq = ERTCO_FREQ;
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break;
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default:
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// Codes 001 and 111 are reserved.
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// This code should never execute, however, initialize to safe value.
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base_freq = HIRC_FREQ;
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break;
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}
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// Get the clock divider
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if (clk_src == MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO)
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{
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base_freq = base_freq >> ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_DIV)>> MXC_F_GCR_CLKCTRL_IPO_DIV_POS);
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}
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div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS;
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SystemCoreClock = base_freq >> div;
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}
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int PreInit(void)
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{
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return 0;
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}
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void SystemInit(void)
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{
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/* Make sure interrupts are enabled. */
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__enable_irq();
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#if (__FPU_PRESENT == 1)
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/* Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11 */
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/* Grant full access, per "Table B3-24 CPACR bit assignments". */
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/* DDI0403D "ARMv7-M Architecture Reference Manual" */
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SCB->CPACR |= SCB_CPACR_CP10_Msk | SCB_CPACR_CP11_Msk;
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__DSB();
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__ISB();
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#endif
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MXC_PWRSEQ->lpcn &= ~(1 << 31); // Ensure ERTCO is on
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MXC_SYS_Clock_Select(MXC_SYS_CLOCK_IPO);
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SystemCoreClockUpdateXdot();
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// Increase drive strength of I2C_SE bus and Mem Pwr En.
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// Note: Mem Pwr En doesn't help, higher drive strength on se i2c pins seems to though
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MXC_GPIO0->ds0 |= (1 << 6) | (1 << 7) | (1 << 24);
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MXC_GPIO0->ds1 |= (1 << 6) | (1 << 7) | (1 << 24);
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MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO0);
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MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO1);
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}

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