Fixed the incorrect implementation of acquire and release semantics in RISCV, as well as some syntax errors

wangzhiyong99 · wangzhiyong99 · commit 7a0d9852cc99 · 2025-07-15T21:10:58.000+08:00
diff --git a/benchmarks/lockhammer/include/atomics.h b/benchmarks/lockhammer/include/atomics.h
@@ -131,7 +131,7 @@ static inline unsigned long fetchadd64_acquire_release (unsigned long *ptr, unsi
             : "memory");
 #elif defined(__riscv) && !defined(USE_BUILTIN)
     asm volatile("amoadd.d.aqrl  %[old], %[val], %[ptr]"
-                : [old] "=&r" (old), [ptr] "+m" (*ptr)
+                : [old] "=&r" (old), [ptr] "+A" (*(ptr))
                 : [val] "r" (addend)
                 : "memory");
 #else
@@ -169,7 +169,7 @@ static inline unsigned long fetchadd64_acquire (unsigned long *ptr, unsigned lon
             : "memory");
 #elif defined(__riscv) && !defined(USE_BUILTIN)
     asm volatile("amoadd.d.aq  %[old], %[val], %[ptr]"
-                : [old] "=&r" (old), [ptr] "+m" (*ptr)
+                : [old] "=&r" (old), [ptr] "+A" (*(ptr))
                 : [val] "r" (addend)
                 : "memory");
 #else
@@ -208,7 +208,7 @@ static inline unsigned long fetchadd64_release (unsigned long *ptr, unsigned lon
             : "memory");
 #elif defined(__riscv) && !defined(USE_BUILTIN)
     asm volatile("amoadd.d.rl  %[old], %[val], %[ptr]"
-                : [old] "=&r" (old), [ptr] "+m" (*ptr)
+                : [old] "=&r" (old), [ptr] "+A" (*(ptr))
                 : [val] "r" (addend)
                 : "memory");
 #else
@@ -246,7 +246,7 @@ static inline unsigned long fetchadd64 (unsigned long *ptr, unsigned long addend
             : "memory");
 #elif defined(__riscv) && !defined(USE_BUILTIN)
     asm volatile("amoadd.d  %[old], %[val], %[ptr]"
-                : [old] "=&r" (old), [ptr] "+m" (*ptr)
+                : [old] "=&r" (old), [ptr] "+A" (*(ptr))
                 : [val] "r" (addend)
                 : "memory");	
 #else
@@ -288,7 +288,7 @@ static inline unsigned long fetchsub64 (unsigned long *ptr, unsigned long addend
 #elif defined(__riscv) && !defined(USE_BUILTIN)
 	addend = (unsigned long) (-(long) addend);
     asm volatile("amoadd.d  %[old], %[val], %[ptr]"
-                : [old] "=&r" (old), [ptr] "+m" (*ptr)
+                : [old] "=&r" (old), [ptr] "+A" (*(ptr))
                 : [val] "r" (addend)
                 : "memory");
 #else
@@ -323,8 +323,8 @@ static inline unsigned long swap64 (unsigned long *ptr, unsigned long val) {
             : [val] "r" (val)
             : "memory");
 #elif defined(__riscv) && !defined(USE_BUILTIN)
-	asm volatile("amoswap.d  %[old], %[val], %[ptr]"
-				: [old] "=&r" (old), [ptr] "+m" (*ptr)
+	asm volatile("amoswap.d.aqrl  %[old], %[val], %[ptr]"
+				: [old] "=&r" (old), [ptr] "+A" (*(ptr))
 				: [val] "r" (val)
 				: "memory");
 #else
@@ -365,16 +365,16 @@ static inline unsigned long cas64 (unsigned long *ptr, unsigned long newval, uns
 	unsigned long tmp;
 
     asm volatile (  "1: lr.d %[old], %[ptr]\n"
-        			"   bne %[old], %[exp], 2f\n"
-        			"   sc.d %[tmp], %[val], %[ptr]\n"
-        			"   bnez %[tmp], 1b\n"
-        			"2:"
-        		: [old] "=&r" (old), [tmp] "=&r" (tmp), [ptr] "+m" (*ptr)
+                    "   bne %[old], %[exp], 2f\n"
+                    "   sc.d %[tmp], %[val], %[ptr]\n"
+                    "   bnez %[tmp], 1b\n"
+                    "2:"
+        		: [old] "=&r" (old), [tmp] "=&r" (tmp), [ptr] "+A" (*(ptr))
         		: [exp] "r" (expected), [val] "r" (newval)
         		: "memory");	
 #elif defined(__riscv) && !defined(USE_BUILTIN) && defined(__riscv_zacas)
     asm volatile("amocas.d  %[exp], %[val], %[ptr]"
-	            : [exp] "=&r" (old), [ptr] "+Q" (*ptr)
+	            : [exp] "=&r" (old), [ptr] "+A" (*(ptr))
     	        : "r[exp]" (expected), [val] "r" (newval)
         	    : "memory");
 #else
@@ -420,12 +420,12 @@ static inline unsigned long cas64_acquire (unsigned long *ptr, unsigned long val
                     "   sc.d %[tmp], %[newval], %[ptr]\n"
                     "   bnez %[tmp], 1b\n"
                     "2:"
-                : [old] "=&r" (old), [tmp] "=&r" (tmp), [ptr] "+m" (*ptr)
+                : [old] "=&r" (old), [tmp] "=&r" (tmp), [ptr] "+A" (*(ptr))
                 : [exp] "r" (exp), [newval] "r" (val)
                 : "memory");
 #elif defined(__riscv) && !defined(USE_BUILTIN) && defined(__riscv_zacas)
     asm volatile("amocas.d  %[exp], %[val], %[ptr]"
-                : [exp] "=&r" (old), [ptr] "+Q" (*ptr)
+                : [exp] "=&r" (old), [ptr] "+A" (*(ptr))
                 : "r[exp]" (exp), [val] "r" (val)
                 : "memory");
 #else
@@ -471,12 +471,12 @@ static inline unsigned long cas64_release (unsigned long *ptr, unsigned long val
                     "   sc.d.rl %[tmp], %[val], %[ptr]\n"
                     "   bnez %[tmp], 1b\n"
                     "2:"
-                : [old] "=&r" (old), [tmp] "=&r" (tmp), [ptr] "+m" (*ptr)
+                : [old] "=&r" (old), [tmp] "=&r" (tmp), [ptr] "+A" (*(ptr))
                 : [exp] "r" (exp), [val] "r" (val)
                 : "memory");
 #elif defined(__riscv) && !defined(USE_BUILTIN) && defined(__riscv_zacas)
     asm volatile("amocas.d.rl  %[exp], %[val], %[ptr]"
-                : [exp] "=&r" (old), [ptr] "+Q" (*ptr)
+                : [exp] "=&r" (old), [ptr] "+A" (*(ptr))
                 : "r[exp]" (exp), [val] "r" (val)
                 : "memory");
 #else
@@ -522,12 +522,12 @@ static inline unsigned long cas64_acquire_release (unsigned long *ptr, unsigned
                     "   sc.d.rl %[tmp], %[val], %[ptr]\n"
                     "   bnez %[tmp], 1b\n"
                     "2:"
-                : [old] "=&r" (old), [tmp] "=&r" (tmp), [ptr] "+m" (*ptr)
+                : [old] "=&r" (old), [tmp] "=&r" (tmp), [ptr] "+A" (*(ptr))
                 : [exp] "r" (exp), [val] "r" (val)
                 : "memory");
 #elif defined(__riscv) && !defined(USE_BUILTIN) && defined(__riscv_zacas)
     asm volatile("amocas.d.aqrl  %[exp], %[val], %[ptr]"
-                : [exp] "=&r" (old), [ptr] "+Q" (*ptr)
+                : [exp] "=&r" (old), [ptr] "+A" (*(ptr))
                 : "r[exp]" (exp), [val] "r" (val)
                 : "memory");
 #else
diff --git a/benchmarks/lockhammer/include/cpu_relax.h b/benchmarks/lockhammer/include/cpu_relax.h
@@ -75,6 +75,6 @@ static inline void __cpu_relax(void) {
 
     }
 }
-#endif 
+#endif // CPU_RELAX_H
 
 /* vim: set tabstop=4 shiftwidth=4 softtabstop=4 expandtab: */
diff --git a/benchmarks/lockhammer/include/perf_timer.h b/benchmarks/lockhammer/include/perf_timer.h
@@ -205,9 +205,10 @@ static inline uint64_t __attribute__((always_inline))
 get_raw_counter(void) {
 	uint64_t t;
     asm volatile(
-        "fence rw, rw\n"
+        "fence.i\n"
+        "fence r, r\n"
         "rdtime %0"
-        : "=&r"(t) : : "memory");
+        : "=r"(t) : :);
 	return t;
 }
 #endif
@@ -221,9 +222,10 @@ timer_reset_counter()
     prev_tsc = rdtscp();
 #elif __riscv
     asm volatile(
-		"fence rw, rw\n"
+        "fence.i\,"
+		"fence r, r\n"
 		"rdtime %0" 
-		: "=&r"(prev_tsc) : : "memory");	
+		: "=r"(prev_tsc) : :);	
 #endif
 }
 
@@ -241,9 +243,10 @@ timer_get_counter()
 #elif __riscv
 	uint64_t counter_value;
     asm volatile(
-        "fence rw, rw\n"
+        "fence.i\n"
+        "fence r, r\n"
         "rdtime %0"
-        : "=&r"(counter_value) : : "memory");
+        : "=r"(counter_value) : :);
 #endif	
     return counter_value;
 }
@@ -263,8 +266,10 @@ timer_get_counter_start()
 	uint64_t counter_value;
     asm volatile(
         "fence rw, rw\n"
+        "fence.i\n"
+        "fence r,r\n"
         "rdtime %0"
-        : "=&r"(counter_value) : : "memory");
+        : "=r"(counter_value) : :);
 #endif
     return counter_value;
 }
@@ -284,10 +289,12 @@ timer_get_counter_end()
 #elif __riscv
 	uint64_t counter_value;
     asm volatile(
-        "fence rw, rw\n"
+        "fence.i\n"
+        "fence r, r\n"
         "rdtime %0\n"
-		"fence rw, rw"
-        : "=&r"(counter_value) : : "memory");
+        "fence.i\n"
+		"fence r, r"
+        : "=r"(counter_value) : :);
 #endif
     return counter_value;
 }
diff --git a/benchmarks/lockhammer/src/measure.c b/benchmarks/lockhammer/src/measure.c
@@ -64,6 +64,7 @@ void dump_mem(void * p, size_t n) {
     }
     printf("\n");
 }
+
 #ifdef __aarch64__
 // The --disable-outline-atomics-lse flag is only relevant to tests built
 // using USE_BUILTIN=1 USE_LSE=0 such that the __atomics intrinsics are
diff --git a/ext/linux/include/lk_atomics.h b/ext/linux/include/lk_atomics.h
@@ -131,12 +131,12 @@ static inline uint32_t atomic_cmpxchg_acquire32(uint32_t *ptr, uint32_t exp, uin
         "   sc.w %[tmp], %[val], %[ptr]\n"    
         "   bnez %[tmp], 1b\n"          
         "2:"
-        : [old] "=&r" (old), [tmp] "=&r" (tmp) , [ptr] "+m" (*(uint32_t *)ptr)
+        : [old] "=&r" (old), [tmp] "=&r" (tmp) , [ptr] "+A" (*(uint32_t *)(ptr))
         : [exp] "r" (exp), [val] "r" (val)
         : "memory");
 #elif defined(__riscv) && defined(__riscv_zacas)
     asm volatile("amocas.w.aq  %[exp], %[val], %[ptr]"
-                : [exp] "=&r" (old), [ptr] "+Q" (*ptr)
+                : [exp] "=&r" (old), [ptr] "+A" (*(ptr))
                 : "r[exp]" (exp), [val] "r" (val)
                 : "memory");	
 #else
@@ -191,12 +191,12 @@ static inline uint32_t atomic_cmpxchg_release32(uint32_t *ptr, uint32_t exp, uin
         "   sc.w.rl %[tmp], %[val], %[ptr]\n"
         "   bnez %[tmp], 1b\n"
         "2:"
-        : [old] "=&r" (old), [tmp] "=&r" (tmp) , [ptr] "+m" (*(uint32_t *)ptr)
+        : [old] "=&r" (old), [tmp] "=&r" (tmp) , [ptr] "+A" (*(uint32_t *)(ptr))
         : [exp] "r" (exp), [val] "r" (val)
         : "memory");
 #elif defined(__riscv) && defined(__riscv_zacas)
     asm volatile("amocas.w.rl  %[exp], %[val], %[ptr]"
-                : [exp] "=&r" (old), [ptr] "+Q" (*(uint32_t *)ptr)
+                : [exp] "=&r" (old), [ptr] "+A" (*(uint32_t *)(ptr))
                 : "r[exp]" (exp), [val] "r" (val)
                 : "memory");
 #else
@@ -251,12 +251,12 @@ static inline uint32_t atomic_cmpxchg_relaxed32(uint32_t *ptr, uint32_t exp, uin
         "   sc.w.rl %[tmp], %[val], %[ptr]\n"
         "   bnez %[tmp], 1b\n"
         "2:"
-        : [old] "=&r" (old), [tmp] "=&r" (tmp) , [ptr] "+m" (*(uint32_t *)ptr)
+        : [old] "=&r" (old), [tmp] "=&r" (tmp) , [ptr] "+A" (*(uint32_t *)(ptr))
         : [exp] "r" (exp), [val] "r" (val)
         : "memory");
 #elif defined(__riscv) && defined(__riscv_zacas)
     asm volatile("amocas.w.aqrl  %[exp], %[val], %[ptr]"
-                : [exp] "=&r" (old), [ptr] "+Q" (*(uint32_t *)ptr)
+                : [exp] "=&r" (old), [ptr] "+A" (*(uint32_t *)(ptr))
                 : "r[exp]" (exp), [val] "r" (val)
                 : "memory");
 #else
@@ -335,7 +335,7 @@ atomic_fetch_or_acquire32(uint32_t i, atomic_t *v)
 		"   sc.w.rl %[tmp], %[val], %[ptr]\n"
 		"   bnez %[tmp], 1b\n"
 		: [old] "=&r" (old_val), [val] "=&r" (new_val), [tmp] "=&r" (tmp)
-		: [ptr] "r" (*((uint32_t *)(&v->counter))), [_val] "r" (i)
+		: [ptr] "A" (*((uint32_t *)(&v->counter))), [_val] "r" (i)
 		: "memory"
     );
 	return old_val;

Original file line number	Diff line number	Diff line change
`@@ -75,6 +75,6 @@ static inline void __cpu_relax(void) {`
`75`	`75`
`76`	`76`	`}`
`77`	`77`	`}`
`78`		`-#endif`
	`78`	`+#endif // CPU_RELAX_H`
`79`	`79`
`80`	`80`	`/* vim: set tabstop=4 shiftwidth=4 softtabstop=4 expandtab: */`
Original file line number	Diff line number	Diff line change
`@@ -64,6 +64,7 @@ void dump_mem(void * p, size_t n) {`
`64`	`64`	`}`
`65`	`65`	`printf("\n");`
`66`	`66`	`}`
	`67`	`+`
`67`	`68`	`#ifdef __aarch64__`
`68`	`69`	`// The --disable-outline-atomics-lse flag is only relevant to tests built`
`69`	`70`	`// using USE_BUILTIN=1 USE_LSE=0 such that the __atomics intrinsics are`