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manish-pandey-armTrustedFirmware Code Review
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Merge changes from topic "hm/handoff-aarch32" into integration
* changes: refactor(arm): simplify early platform setup functions feat(bl32): enable r3 usage for boot args feat(handoff): add lib to sp-min sources feat(handoff): add 32-bit variant of SRAM layout feat(handoff): add 32-bit variant of ep info fix(aarch32): avoid using r12 to store boot params fix(arm): reinit secure and non-secure tls refactor(handoff): downgrade error messages
2 parents b78c307 + 8921349 commit 518b278

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14 files changed

+45
-38
lines changed

14 files changed

+45
-38
lines changed

‎bl2/aarch32/bl2_entrypoint.S

+9-9
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
2+
* Copyright (c) 2016-2024, ARM Limited and Contributors. All rights reserved.
33
*
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
@@ -29,10 +29,10 @@ func bl2_entrypoint
2929
* use.
3030
* ---------------------------------------------
3131
*/
32-
mov r9, r0
33-
mov r10, r1
34-
mov r11, r2
35-
mov r12, r3
32+
mov r8, r0
33+
mov r9, r1
34+
mov r10, r2
35+
mov r11, r3
3636

3737
/* ---------------------------------------------
3838
* Set the exception vector to something sane.
@@ -114,10 +114,10 @@ func bl2_entrypoint
114114
* Perform BL2 setup
115115
* ---------------------------------------------
116116
*/
117-
mov r0, r9
118-
mov r1, r10
119-
mov r2, r11
120-
mov r3, r12
117+
mov r0, r8
118+
mov r1, r9
119+
mov r2, r10
120+
mov r3, r11
121121

122122
bl bl2_setup
123123

‎bl32/sp_min/sp_min.mk

+5-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
#
2-
# Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
2+
# Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
33
#
44
# SPDX-License-Identifier: BSD-3-Clause
55
#
@@ -83,3 +83,7 @@ $(eval $(call assert_boolean,RESET_TO_SP_MIN))
8383
SP_MIN_WITH_SECURE_FIQ ?= 0
8484
$(eval $(call add_define,SP_MIN_WITH_SECURE_FIQ))
8585
$(eval $(call assert_boolean,SP_MIN_WITH_SECURE_FIQ))
86+
87+
ifeq (${TRANSFER_LIST},1)
88+
BL32_SOURCES += $(TRANSFER_LIST_SOURCES)
89+
endif

‎bl32/sp_min/sp_min_main.c

+2-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
2+
* Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
33
*
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
@@ -113,6 +113,7 @@ static void copy_cpu_ctx_to_smc_stx(const regs_t *cpu_reg_ctx,
113113
next_smc_ctx->r0 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R0);
114114
next_smc_ctx->r1 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R1);
115115
next_smc_ctx->r2 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R2);
116+
next_smc_ctx->r3 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R3);
116117
next_smc_ctx->lr_mon = read_ctx_reg(cpu_reg_ctx, CTX_LR);
117118
next_smc_ctx->spsr_mon = read_ctx_reg(cpu_reg_ctx, CTX_SPSR);
118119
next_smc_ctx->scr = read_ctx_reg(cpu_reg_ctx, CTX_SCR);

‎changelog.yaml

+3
Original file line numberDiff line numberDiff line change
@@ -1276,6 +1276,9 @@ subsections:
12761276
- title: AArch64
12771277
scope: aarch64
12781278

1279+
- title: AArch32
1280+
scope: aarch32
1281+
12791282
- title: Debug
12801283
scope: debug
12811284

‎include/lib/transfer_list.h

+2
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,8 @@ enum transfer_list_tag_id {
6262
TL_TAG_EXEC_EP_INFO64 = 0x102,
6363
TL_TAG_SRAM_LAYOUT64 = 0x104,
6464
TL_TAG_MBEDTLS_HEAP_INFO = 0x105,
65+
TL_TAG_EXEC_EP_INFO32 = 0x106,
66+
TL_TAG_SRAM_LAYOUT32 = 0x107,
6567
};
6668

6769
enum transfer_list_ops {

‎include/plat/arm/common/plat_arm.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -298,8 +298,8 @@ void arm_transfer_list_get_heap_info(void **heap_addr, size_t *heap_size);
298298
void arm_tsp_early_platform_setup(void);
299299

300300
/* SP_MIN utility functions */
301-
void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
302-
uintptr_t hw_config, void *plat_params_from_bl2);
301+
void arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
302+
u_register_t arg2, u_register_t arg3);
303303
void arm_sp_min_plat_runtime_setup(void);
304304
void arm_sp_min_plat_arch_setup(void);
305305

‎lib/transfer_list/transfer_list.c

+6-9
Original file line numberDiff line numberDiff line change
@@ -176,35 +176,32 @@ transfer_list_check_header(const struct transfer_list_header *tl)
176176
}
177177

178178
if (tl->signature != TRANSFER_LIST_SIGNATURE) {
179-
ERROR("Bad transfer list signature 0x%x\n", tl->signature);
179+
VERBOSE("Bad transfer list signature 0x%x\n", tl->signature);
180180
return TL_OPS_NON;
181181
}
182182

183183
if (!tl->max_size) {
184-
ERROR("Bad transfer list max size 0x%x\n",
185-
tl->max_size);
184+
VERBOSE("Bad transfer list max size 0x%x\n", tl->max_size);
186185
return TL_OPS_NON;
187186
}
188187

189188
if (tl->size > tl->max_size) {
190-
ERROR("Bad transfer list size 0x%x\n", tl->size);
189+
VERBOSE("Bad transfer list size 0x%x\n", tl->size);
191190
return TL_OPS_NON;
192191
}
193192

194193
if (tl->hdr_size != sizeof(struct transfer_list_header)) {
195-
ERROR("Bad transfer list header size 0x%x\n",
196-
tl->hdr_size);
194+
VERBOSE("Bad transfer list header size 0x%x\n", tl->hdr_size);
197195
return TL_OPS_NON;
198196
}
199197

200198
if (!transfer_list_verify_checksum(tl)) {
201-
ERROR("Bad transfer list checksum 0x%x\n",
202-
tl->checksum);
199+
VERBOSE("Bad transfer list checksum 0x%x\n", tl->checksum);
203200
return TL_OPS_NON;
204201
}
205202

206203
if (tl->version == 0) {
207-
ERROR("Transfer list version is invalid\n");
204+
VERBOSE("Transfer list version is invalid\n");
208205
return TL_OPS_NON;
209206
} else if (tl->version == TRANSFER_LIST_VERSION) {
210207
INFO("Transfer list version is valid for all operations\n");

‎plat/arm/board/a5ds/sp_min/a5ds_sp_min_setup.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2019, ARM Limited. All rights reserved.
2+
* Copyright (c) 2019-2025, Arm Limited. All rights reserved.
33
*
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
@@ -11,7 +11,7 @@
1111
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
1212
u_register_t arg2, u_register_t arg3)
1313
{
14-
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
14+
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
1515

1616
/* enable snoop control unit */
1717
enable_snoop_ctrl_unit(A5DS_SCU_BASE);

‎plat/arm/board/corstone700/sp_min/corstone700_sp_min_setup.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2019, Arm Limited and Contributors. All rights reserved.
2+
* Copyright (c) 2019-2025, Arm Limited and Contributors. All rights reserved.
33
*
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
@@ -9,5 +9,5 @@
99
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
1010
u_register_t arg2, u_register_t arg3)
1111
{
12-
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
12+
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
1313
}

‎plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
2+
* Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
33
*
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
@@ -34,7 +34,7 @@ void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
3434
}
3535
#endif /* !RESET_TO_SP_MIN && !RESET_TO_BL2 */
3636

37-
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
37+
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
3838

3939
/* Initialize the platform config for future decision making */
4040
fvp_config_setup();

‎plat/arm/board/fvp_ve/sp_min/fvp_ve_sp_min_setup.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2019, Arm Limited. All rights reserved.
2+
* Copyright (c) 2019-2025, Arm Limited. All rights reserved.
33
*
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
@@ -11,5 +11,5 @@
1111
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
1212
u_register_t arg2, u_register_t arg3)
1313
{
14-
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
14+
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
1515
}

‎plat/arm/common/arm_bl1_setup.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ void arm_bl1_early_platform_setup(void)
9090
bl1_tzram_layout.total_size = ARM_BL_RAM_SIZE;
9191

9292
#if TRANSFER_LIST
93-
secure_tl = transfer_list_ensure((void *)PLAT_ARM_EL3_FW_HANDOFF_BASE,
93+
secure_tl = transfer_list_init((void *)PLAT_ARM_EL3_FW_HANDOFF_BASE,
9494
PLAT_ARM_FW_HANDOFF_SIZE);
9595
assert(secure_tl != NULL);
9696
#endif

‎plat/arm/common/arm_bl31_setup.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -382,8 +382,8 @@ void arm_bl31_platform_setup(void)
382382
struct transfer_list_entry *te __unused;
383383

384384
#if TRANSFER_LIST && !RESET_TO_BL31
385-
ns_tl = transfer_list_ensure((void *)FW_NS_HANDOFF_BASE,
386-
PLAT_ARM_FW_HANDOFF_SIZE);
385+
ns_tl = transfer_list_init((void *)FW_NS_HANDOFF_BASE,
386+
PLAT_ARM_FW_HANDOFF_SIZE);
387387
if (ns_tl == NULL) {
388388
ERROR("Non-secure transfer list initialisation failed!\n");
389389
panic();

‎plat/arm/common/sp_min/arm_sp_min_setup.c

+5-5
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2016-2024, ARM Limited and Contributors. All rights reserved.
2+
* Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
33
*
44
* SPDX-License-Identifier: BSD-3-Clause
55
*/
@@ -61,8 +61,8 @@ entry_point_info_t *sp_min_plat_get_bl33_ep_info(void)
6161
/*******************************************************************************
6262
* Utility function to perform early platform setup.
6363
******************************************************************************/
64-
void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
65-
uintptr_t hw_config, void *plat_params_from_bl2)
64+
void arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
65+
u_register_t arg2, u_register_t arg3)
6666
{
6767
/* Initialize the console to provide early debug support */
6868
arm_console_boot_init();
@@ -99,7 +99,7 @@ void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
9999
/*
100100
* Check params passed from BL2 should not be NULL,
101101
*/
102-
bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
102+
bl_params_t *params_from_bl2 = (bl_params_t *)arg0;
103103
assert(params_from_bl2 != NULL);
104104
assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
105105
assert(params_from_bl2->h.version >= VERSION_2);
@@ -132,7 +132,7 @@ void arm_sp_min_early_platform_setup(void *from_bl2, uintptr_t tos_fw_config,
132132
void plat_arm_sp_min_early_platform_setup(u_register_t arg0, u_register_t arg1,
133133
u_register_t arg2, u_register_t arg3)
134134
{
135-
arm_sp_min_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
135+
arm_sp_min_early_platform_setup(arg0, arg1, arg2, arg3);
136136

137137
/*
138138
* Initialize Interconnect for this cluster during cold boot.

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