Add modules TBs

Author: 0marAmr

modules_testbenches/alu_decoder_tb.v

@@ -3,7 +3,7 @@
 // Company: 
 // Engineer: 
 // 
-// Create Date: 03/07/2023 11:23:48 AM
+// Create Date: 03/06/2023 11:23:48 PM
 // Design Name: 
 // Module Name: alu_decoder_tb
 // Project Name: 

modules_testbenches/control_unit_tb.v

@@ -3,7 +3,7 @@
 // Company: 
 // Engineer: 
 // 
-// Create Date: 03/07/2023 09:25:30 AM
+// Create Date: 03/04/2023 06:25:30 PM
 // Design Name: 
 // Module Name: control_unit_tb
 // Project Name: 

modules_testbenches/instr_mem_tb.v

@@ -3,7 +3,7 @@
 // Company: 
 // Engineer: 
 // 
-// Create Date: 03/07/2023 09:08:49 AM
+// Create Date: 03/06/2023 09:08:49 PM
 // Design Name: 
 // Module Name: instr_mem_tb
 // Project Name: 

modules_testbenches/instruction_fetch_unit_tb.v

@@ -3,7 +3,7 @@
 // Company: 
 // Engineer: 
 // 
-// Create Date: 03/07/2023 09:08:49 AM
+// Create Date: 03/06/2023 09:08:49 PM
 // Design Name: 
 // Module Name: instruction_fetch_unit_tb
 // Project Name: 

modules_testbenches/sign_extend_tb.v

@@ -3,7 +3,7 @@
 // Company: 
 // Engineer: 
 // 
-// Create Date: 03/07/2023 01:13:02 AM
+// Create Date: 03/04/2023 01:13:02 PM
 // Design Name: 
 // Module Name: sign_extend_tb
 // Project Name: